Designed experiment to assess flip-chip-on-board reliability

Proceedings of the IEEE/CPMT International Electronics Manufacturing Technology (IEMT) Symposium

Volumn , Issue , 1998, Pages 16-23

  Yegnasubramanian, S ^a   Deshmukh, R ^a   Fanucci, R ^a   Gannon, J ^a   Serafino, A ^a   Morris, J R ^a  

^a LUCENT TECHNOLOGIES   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CHIP SCALE PACKAGES; CRACKS; FAILURE MODES; FLIP CHIP DEVICES; INDUSTRIAL ELECTRONICS; PASSIVATION;

DESIGNED EXPERIMENTS; FAILURE MODE ANALYSIS; FLIP CHIP ASSEMBLIES; FUNCTIONAL DEPENDENCE; RELIABILITY PERFORMANCE; SUBSTRATE THICKNESS; UNDER-BUMP METALLURGIES; UNDERFILL MATERIALS;

SUBSTRATES;

EID: 0005103776     PISSN: 10898190     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEMT.1998.731003     Document Type: Conference Paper

References (4)

1. Yegnasubramanian, S., et al, "Flip-Chip-on-. =-.-) Board (FCOB) Assembly and Reliability", Proc. '/j Int'l Elec. Mfg. Tech. Symp., Austin, TX, Oct. •"'?' 1997, pp. 32-36.
2. Li Li, "Effect of Underfill encapsulation on the thermal deformations of flip chip organic packages", Proc. SEM Spring Conf. on Experimental Mechanics, Bellvue, WA, JUne 1997, pp. 11-12
3. Suryanarayana, D. et al, "Flip chip solder bump fatigue life enhanced by polymer encapsulation", Proc. 40th ECTC, (1990), vol. 1, pp. 338-344.
4. J-STD-012 Implementation of flip chip and chip scale technology, January 1996.