A memory-layout oriented run-time technique for locality optimization on SMPs

Proceedings of the International Conference on Parallel Processing

Volumn , Issue , 1998, Pages 189-196

  Yan, Yong ^a   Zhang, Xiaodong ^b   Zhang, Zhao ^b  

^a HAL Computer Systems   (United States)

^b The College of William and Mary   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION PROGRAMS; DATA HANDLING; EMBEDDED SYSTEMS; MEMORY ARCHITECTURE; MULTIPROCESSING SYSTEMS; PROGRAM COMPILERS; SHAPE MEMORY EFFECT;

CACHE ARCHITECTURE; CACHE LOCALITY; COMPILER OPTIMIZATIONS; LOCALITY OPTIMIZATION; MEMORY PERFORMANCE; PROGRAM TRANSFORMATIONS; SIMULATIONS AND MEASUREMENTS; SYMMETRIC MULTI-PROCESSORS;

CACHE MEMORY;

EID: 0004871610     PISSN: 01903918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICPP.1998.708484     Document Type: Conference Paper

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