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Volumn 45, Issue 3, 1999, Pages 515-525

A cost-efficient and fully-pipelinable architecture for DCT/IDCT

Author keywords

[No Author keywords available]

Indexed keywords


EID: 0002911161     PISSN: 00983063     EISSN: None     Source Type: Journal    
DOI: 10.1109/30.793535     Document Type: Article
Times cited : (11)

References (15)
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  • 7
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  • 9
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    • DCT/IDCT Processor Design for High Data Rate Image Coding
    • June
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  • 10
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  • 12
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  • 13
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  • 15
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.