Reliability testing and stress strain estimations of flip-chip joints made by stud-bump-bonding technique

Proceedings of 3rd International Conference on Adhesive Joining and Coating Technology in Electronics Manufacturing 1998, ADHES 1998

Volumn 1998-September, Issue , 1998, Pages 305-311

  Lenkkeri, J ^a   Vahakangas, J ^a  

^a VTT TECHNICAL RESEARCH CENTRE OF FINLAND   (Finland)

Author keywords

[No Author keywords available]

Indexed keywords

ADHESIVE JOINTS; ALUMINA; ALUMINUM OXIDE; BONDING; COATINGS; CONDUCTIVE MATERIALS; DEFORMATION; JOINING; RELIABILITY; STUDS (FASTENERS); STUDS (STRUCTURAL MEMBERS); SUBSTRATES; TEMPERATURE DISTRIBUTION; THERMAL EXPANSION;

DIFFERENTIAL THERMAL EXPANSION; ISOTROPICALLY CONDUCTIVE ADHESIVES; STRENGTH OF ADHESIVE JOINTS; STRESS-STRAIN BEHAVIORS; TEMPERATURE DEPENDENCE; THERMAL EXPANSION COEFFICIENTS; THERMALLY INDUCED DEFORMATIONS; UNDERFILL DISPENSING;

FLIP CHIP DEVICES;

EID: 0002499707     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ADHES.1998.742046     Document Type: Conference Paper

References (9)

1. Y. Bessho, Y. Tomura, T. Shiraishi, M. Ono, T. Ishida and K. Omoya, Advanced Flip-Chip Bonding Technique to Organic Substrates, ISHM 95 Proceedings, 359-64.
2. Y. Bessho, Y. Tomura, Y. Hakotani, M. Tsukamoto, T. Ishida and K. Omoya, A Stud-Bump-Bonding Technique for High Density Multi-Chip-Module, Japan Int'l Electronic:; Manufacturing Technology Symposium 1993, FA1-1, 362-5.
3. Y. Tomura, Y. Bessho, T. Shiraishi, M. Itagaki, S. Yahaku, T. Ishida and T. Ohbayashi, Advanced Flip Chip Bonding Technique for MCM-L, Pan Pacific Microelectronic:; Symposium, 1996, 125-3 1.
4. K. Onishi, S. Seki, Y. Taguchi, Y. Bessho, K. Eda and T Ishida, An Application of a Flip-Chip-Bonding Technique tci GHz-Band SAW Filters for Mobile Communication, IEICE, Trans. Electron. Vol E76-C, No. 6 June 1993, 993-999.
5. P. M. Hall, Forces, Moments, and Displacements During Thermal Chamber Cycling of Leadless Ceramic Chip Carriers Soldered to Printed Boards, IEEE Transactions on Components, Hybrids, and Manufacturing Technology, Vol. CHMT-7, No. 4, December 1984, 314-27.
6. E. Jih and Y. Pao, Evaluation of Design Parameters for Leadless Chip Resistors Solder Joints, Trans of the ASME Journal of Electronic Packaging, Vol. 117 June 1995, 94-9.
7. S. X. Wu, Y. Mei, C Yeh and Karl Wyaltt, Process Induced Residual Stresses in Isotropically Conductive Adhesive Joints, Adhesives in Electronics '96, 133-140.
8. R. Dudek, M. Scherzer, A. Schubert and B. Michel, FEsimulation for Polymeric Packaging Materials, Proceedings of PEP 97, (1997) 140-8.
9. R. L. Keusseyan, J. L. Dilday and B. S. Speck, Electric Contact Phenomena in Conductive Adhesive Interconnections, The International Journal of Microcircuits and Electronic Packaging, Vol 17, No 3, 1994, 236-42.