Variable size analysis and validation of computation quality

Proceedings - IEEE International High-Level Design Validation and Test Workshop, HLDVT

Volumn 2000-January, Issue , 2000, Pages 95-100

  Yamashita, H ^a   Yasnura, H ^a   Eko, F N ^a   Yun, Cao ^a  

^a KYUSHU UNIVERSITY   (Japan)

Author keywords

Computational modeling; Computer science; Costs; Data analysis; Design methodology; Embedded system; Energy consumption; Hardware design languages; Information science; System performance

Indexed keywords

COMPUTER HARDWARE; COMPUTER SCIENCE; COST BENEFIT ANALYSIS; COSTS; DATA REDUCTION; DESIGN; ECONOMIC AND SOCIAL EFFECTS; EMBEDDED SYSTEMS; ENERGY UTILIZATION; HARDWARE; INFORMATION SCIENCE; MICROPROCESSOR CHIPS; MODELING LANGUAGES;

COMPUTATION QUALITY; COMPUTATIONAL MODEL; DESIGN METHODOLOGY; DYNAMIC APPROACHES; HARDWARE DESIGN LANGUAGE; MULTIMEDIA EMBEDDED SYSTEMS; QUALITY OF COMPUTATION; SYSTEM PERFORMANCE;

QUALITY CONTROL;

EID: 0002488871     PISSN: 15526674     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/HLDVT.2000.889566     Document Type: Conference Paper

References (6)

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6. ftp://ftp.mpeg.org/pub/mpeg/mssg/.