Increased hole trapping in gate oxides as latent damage from plasma charging

Semiconductor Science and Technology

Volumn 12, Issue 12, 1997, Pages 1551-1558

  Brozek, Tomasz ^a   Viswanathan, Chand R ^b  

^a MOTOROLA INC   (United States)

^b University of California   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 0001311869     PISSN: 02681242     EISSN: None     Source Type: Journal    
DOI: 10.1088/0268-1242/12/12/002     Document Type: Article

References (16)

1. Shin H, King C-C and Hu C 1992 Thin oxide damage by plasma etching and ashing processes Proc. IEEE Int. Rel. Phys. Symp. p 37
2. Noguchi K and Okumura K 1994 The effect of plasma-induced oxide and interface degradation on hot carrier reliability Proc. IEEE Int. Rel. Phys. Symp. p 232
3. King J C and Hu C 1994 Effect of low and high temperature anneal on process-induced damage of gate oxide IEEE Electron Device Lett. 15 475
4. Fonash S, Viswanathan C R and Chan Y D 1994 A survey of damage effects in plasma etching Solid State Technol. 37 99
5. Li X, Brożek T, Chan Y D and Viswanathan C R 1995 Degraded CMOS hot carrier life time - role of plasma etching induced charging damage and edge damage Proc. IEEE Int. Rel. Phys. Symp. p 260
6. DiMaria D J, Cartier E and Arnold D 1993 Impact ionization, trap creation, degradation, and breakdown in silicon dioxide films on silicon J. Appl. Phys. 73 3367
7. Cheung K P 1994 An efficient method for plasma-charging damage measurement IEEE Electron Device Lett. 15 460
8. Brozek T, Chan Y D and Viswanathan C R 1995 Role of temperature in process-induced charging damage in sub-micron CMOS transistors Tech. Dig. Int. Electron Device Meeting p 311
9. Brozek T and Viswanathan C R 1996 Generation of hole traps in thin silicon oxide layers under high-field electron injection Appl. Phys. Lett. 68 1826
10. Cheung K P and Chang C P 1994 Plasma-charging damage: a physical model J. Appl. Phys. 75 4415
11. Chan Y D 1994 Using SEMATECH electrical test structures in assessing plasma induced damage in poly etching Japan. J. Appl. Phys. P1 33 4458
12. Li X, Brożek T, Chan Y D, Preuninger F and Viswanathan C R 1996 Evaluation of plasma damage using fully processed MOS transistors J. Vac. Sci. Technol. B 14 571
13. Brożek T, Chan Y D and Viswanathan C R 1995 A model for threshold voltage shift under positive and negative high-field electron injection in CMOS transistors Japan. J. Appl. Phys. 34 pt 1 969
14. 2 J. Appl. Phys. 44 2681
15. Woltjer R, Paulzen G M, Lifka H and Woerlee P 1994 Positive oxide charge generation during 0.25 μm PMOSFET hot-carrier degradation IEEE Electron Device Lett. 15 427
16. Haddad S, Chang C, Swaminathan B and Lien J 1989 Degradations due to hole trapping in flash memory cells IEEE Electron Device Lett. 10 117