Electrical study of MOS structure with Ge embedded in SiO2 as floating gate for nonvolatile memory

Superlattices and Microstructures

Volumn 36, Issue 1-3, 2004, Pages 143-148

  Kanoun, M ^a   Lemiti, M ^a   Bremond, G ^a   Souifi, A ^a   Bassani, F ^b   Berbezier, I ^b  

^a INSTITUT DES NANOTECHNOLOGIES DE LYON   (France)

^b Campus de Luminy ^*  (France)

Author keywords

[No Author keywords available]

Indexed keywords

ANNEALING; CHARGE CARRIERS; DENSIFICATION; DEPOSITION; ELECTRON TRAPS; GERMANIUM COMPOUNDS; NANOSTRUCTURED MATERIALS; OXIDATION; SILICA;

DRY OXIDATION; ELECTRON TRAPPING; NANOCRYSTALS; NONVOLATILE MEMORY;

MOS DEVICES;

EID: 9644257541     PISSN: 07496036     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.spmi.2004.08.004     Document Type: Article

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