Digit systolic algorithms for fine-grain architectures

Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors

Volumn , Issue , 1993, Pages 466-477

  Nagendra, C ^a   Owens, R M ^a   Irwin, M J ^a  

^a PENNSYLVANIA STATE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

NUMBERING SYSTEMS;

BIT-SERIAL METHOD; CARRY PROPAGATION; COMMUNICATION COMPLEXITY; ONLINE TECHNIQUE; PLACEMENT AND ROUTING; PROGRAMMABLE ARCHITECTURES; SIGNED DIGIT NUMBER SYSTEM; VARIABLE PRECISION;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 9344255937     PISSN: 10636862     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASAP.1993.397167     Document Type: Conference Paper

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