-
1
-
-
0742284705
-
Sun flips bits in chips
-
and 24, 10 Nov.
-
D. Lamer, "Sun flips bits in chips," Electronics Times, No. 878, p. 72 and 24, 10 Nov. 1997.
-
(1997)
Electronics Times
, Issue.878
, pp. 72
-
-
Lamer, D.1
-
2
-
-
0017524659
-
On totally self-checking checkers for separable codes
-
Aug.
-
M. J. Ashjaee and S. M. Reddy, "On totally self-checking checkers for separable codes," IEEE Trans. Comput., vol. C-26, pp. 737-744, Aug. 1977.
-
(1977)
IEEE Trans. Comput.
, vol.C-26
, pp. 737-744
-
-
Ashjaee, M.J.1
Reddy, S.M.2
-
3
-
-
0018058113
-
Design of self-checking checkers for berger codes
-
Toulouse, France, June
-
M. A. Marouf and A. D. Friedman, "Design of self-checking checkers for Berger codes," in Dig., Pap. 8th Int. FTC Symp., Toulouse, France, June 1978, pp. 179-184.
-
(1978)
Dig., Pap. 8th Int. FTC Symp.
, pp. 179-184
-
-
Marouf, M.A.1
Friedman, A.D.2
-
4
-
-
0023346714
-
Design of fast self-testing checkers for berger codes
-
May
-
S. J. Piestrak, "Design of fast self-testing checkers for Berger codes," IEEE Trans. Comput., vol. C-36, pp. 629-634, May 1987.
-
(1987)
IEEE Trans. Comput.
, vol.C-36
, pp. 629-634
-
-
Piestrak, S.J.1
-
5
-
-
0024140994
-
The design of fast totally self-checking berger code checkers
-
Tokyo, Japan, June
-
J.-Ch. Lo and S. Thanawastien, "The design of fast totally self-checking Berger code checkers," in Dig., Pap. 18th Int. FTC Symp., Tokyo, Japan, June 1988, pp. 226-231.
-
(1988)
Dig., Pap. 18th Int. FTC Symp.
, pp. 226-231
-
-
Lo, J.-Ch.1
Thanawastien, S.2
-
6
-
-
0025673042
-
The minimal test set for sorting networks and the use of sorting networks in self-testing checkers for unordered codes
-
Newcastle upon Tyne, UK, June 26-28
-
S. J. Piestrak, "The minimal test set for sorting networks and the use of sorting networks in self-testing checkers for unordered codes," in Dig., Pap. 20th Int. FTC Symp., Newcastle upon Tyne, UK, June 26-28, 1990, pp. 457-464.
-
(1990)
Dig., Pap. 20th Int. FTC Symp.
, pp. 457-464
-
-
Piestrak, S.J.1
-
7
-
-
77958464512
-
Design of self-testing checkers for unidirectional error detecting codes
-
Ser.: Monographs No. 24, Oficyna Wyd. Polit. Wrocł Wroclaw
-
-, Design of Self-Testing Checkers for Unidirectional Error Detecting Codes, Scientific Papers of the Inst, of Techn. Cybern, of the Techn. Univ. of Wroclaw, No. 92, Ser.: Monographs No. 24, Oficyna Wyd. Polit. Wrocł., Wroclaw 1995, 112 pp.
-
(1995)
Scientific Papers of the Inst, of Techn. Cybern, of the Techn. Univ. of Wroclaw
, Issue.92
-
-
Piestrak, S.J.1
-
8
-
-
0008539881
-
Design of encoders and self-testing checkers for some systematic unidirectional error detecting codes
-
-, "Design of encoders and self-testing checkers for some systematic unidirectional error detecting codes," Int. J. on Microelectronic Systems Integration, vol. 5, pp. 246-260, No. 4, 1997.
-
(1997)
Int. J. on Microelectronic Systems Integration
, vol.5
, Issue.4
, pp. 246-260
-
-
Piestrak, S.J.1
-
10
-
-
0032597986
-
New efficient totally self-checking berger code checkers
-
1 Sep.
-
X. Kavousianos, D. Nikolos, G. Foukarakis, and T. Gnardellis, "New efficient totally self-checking Berger code checkers," Integration, The VLSI Journal, vol. 28, Issue 1, pp. 101-118, 1 Sep. 1999.
-
(1999)
Integration, the VLSI Journal
, vol.28
, Issue.1
, pp. 101-118
-
-
Kavousianos, X.1
Nikolos, D.2
Foukarakis, G.3
Gnardellis, T.4
-
11
-
-
9244222570
-
Design of low-power CMOS two-rail checkers
-
M. Favalli and C. Metra, "Design of low-power CMOS two-rail checkers," Int. J. on Microelectronic Systems Integration, vol. 5, pp. 101-110, No. 2, 1997.
-
(1997)
Int. J. on Microelectronic Systems Integration
, vol.5
, Issue.2
, pp. 101-110
-
-
Favalli, M.1
Metra, C.2
-
13
-
-
0001305152
-
Design of dynamically checked computers
-
Edinburgh, Scotland, Aug.
-
W. C. Carter and P. R. Schneider, "Design of dynamically checked computers," in Proc. IFIP Conf., Edinburgh, Scotland, Aug. 1968, pp. 878-883.
-
(1968)
Proc. IFIP Conf.
, pp. 878-883
-
-
Carter, W.C.1
Schneider, P.R.2
-
14
-
-
0015604443
-
Design of totally self-checking check circuits for m-out-of-n codes
-
Mar.
-
D. A. Anderson and G. Metze, "Design of totally self-checking check circuits for m-out-of-n codes," IEEE Trans. Comput., vol. C-22, pp. 263-269, Mar. 1973.
-
(1973)
IEEE Trans. Comput.
, vol.C-22
, pp. 263-269
-
-
Anderson, D.A.1
Metze, G.2
-
15
-
-
0003035229
-
A note on error detection codes for asymmetric binary channels
-
Mar.
-
J. M. Berger, "A note on error detection codes for asymmetric binary channels," Inform. Contr., vol. 4, pp. 68-73, Mar. 1961.
-
(1961)
Inform. Contr.
, vol.4
, pp. 68-73
-
-
Berger, J.M.1
-
16
-
-
85042770374
-
Design method of a class of embedded combinational self-testing checkers for 2-rail codes
-
S. J. Piestrak, "Design method of a class of embedded combinational self-testing checkers for 2-rail codes," IEEE Trans. Comput., vol. C-50, 2001.
-
(2001)
IEEE Trans. Comput.
, vol.C-50
-
-
Piestrak, S.J.1
-
17
-
-
0027608762
-
The minimal test set for multi-output threshold circuits implemented as sorting networks
-
June
-
-, "The minimal test set for multi-output threshold circuits implemented as sorting networks," IEEE Trans. Comput., vol. 42, pp. 700-712, June 1993.
-
(1993)
IEEE Trans. Comput.
, vol.42
, pp. 700-712
-
-
Piestrak, S.J.1
-
18
-
-
85154002090
-
Sorting networks and their applications
-
AFIPS
-
K. E. Batcher, "Sorting networks and their applications," in Proc. 1968 SJCC Spring Joint Computer Conf., AFIPS, vol. 32, 1968, pp. 307-314.
-
(1968)
Proc. 1968 SJCC Spring Joint Computer Conf.
, vol.32
, pp. 307-314
-
-
Batcher, K.E.1
-
19
-
-
77950860356
-
-
2nd Ed., Reading, MA, Addison-Wesley ch. 5
-
D. E. Knuth, The Art of Computer Programming, Vol. 111, Sorting and Searching, 2nd Ed., Reading, MA, Addison-Wesley, 1973, ch. 5.
-
(1973)
The Art of Computer Programming, Vol. 111, Sorting and Searching
-
-
Knuth, D.E.1
-
21
-
-
0034598690
-
Minimal test set for multi-output threshold circuits implemented as bubble sorting networks
-
S. J. Piestrak and A. Dandache, "Minimal test set for multi-output threshold circuits implemented as bubble sorting networks," Electr. Lett., vol. 36, pp. 202-204, No. 3, 2000.
-
(2000)
Electr. Lett.
, vol.36
, Issue.3
, pp. 202-204
-
-
Piestrak, S.J.1
Dandache, A.2
-
22
-
-
85042749504
-
Comments on 'Novel totally self-checking berger checker designs based on generalized berger code partitioning'
-
subm. in Jan. to
-
S. J. Piestrak, "Comments on 'Novel totally self-checking Berger checker designs based on generalized Berger code partitioning'," subm. in Jan. 1999 to IEEE Trans. Comput.
-
(1999)
IEEE Trans. Comput.
-
-
Piestrak, S.J.1
-
23
-
-
0027646664
-
Novel totally self-checking berger checker designs based on generalized berger code partitioning
-
Aug.
-
T. R. N. Rao et al., "Novel totally self-checking Berger checker designs based on generalized Berger code partitioning," IEEE Trans. Comput., vol. 42, pp. 1020-1024, Aug. 1993.
-
(1993)
IEEE Trans. Comput.
, vol.42
, pp. 1020-1024
-
-
Rao, T.R.N.1
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