Substrate bias amplification of a SiC junction field effect transistor with a catalytic gate electrode

Materials Science Forum

Volumn 457-460, Issue II, 2004, Pages 1507-1510

  Nakagomi, S ^a   Takahashi, M ^a   Kokubun, Y ^a   Uneus L ^b   Savage, S ^c   Wingbrant, H ^b   Andersson, M ^b   Lundstrom I ^b   Lofdahl M ^d   Spetz, A Lloyd ^b  

^a ISHINOMAKI SENSHU UNIVERSITY   (Japan)

^b LINKÖPING UNIVERSITY   (Sweden)

^c ACREO AB   (Sweden)

^d AppliedSensor AB   (Sweden)

Author keywords

Buried channel; Catalytic gate; Gas sensor; High temperature; JFET; SIT; Substrate bias

Indexed keywords

AMPLIFICATION; CHEMICAL SENSORS; CURRENT VOLTAGE CHARACTERISTICS; ELECTRODES; HIGH TEMPERATURE EFFECTS; JUNCTION GATE FIELD EFFECT TRANSISTORS; SCHOTTKY BARRIER DIODES;

BURIED CHANNELS; CATALYTIC GATES; STATIC INDUCTION TRANSISTORS (SIT); SUBSTRATE BIAS;

SILICON CARBIDE;

EID: 8744298422     PISSN: 02555476     EISSN: 16629752     Source Type: Book Series    
DOI: 10.4028/www.scientific.net/msf.457-460.1507     Document Type: Conference Paper

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