Design concepts and guidelines for VRMs from a power stage perspective

PESC Record - IEEE Annual Power Electronics Specialists Conference

Volumn 3, Issue , 2004, Pages 2218-2224

  Soto, A ^a   Alou, P ^a   Cobos, J A ^a  

^a UNIVERSIDAD POLITÉCNICA DE MADRID   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

BUCK CONVERTERS; DYNAMIC REGULATION; MOTHERBOARDS; SWITCHING FREQUENCY;

CAPACITANCE; DYNAMIC RESPONSE; ELECTRIC CONVERTERS; MOSFET DEVICES; SPECIFICATIONS;

VOLTAGE CONTROL;

EID: 8744264871     PISSN: 02759306     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/PESC.2004.1355465     Document Type: Conference Paper

References (5)

1. Intel Corp, "Intel Pentium-4 Processor VR-Down Design Guidelines", November 2002.
2. P-L. Wong, F. Lee, P. Xu. And K. Yao "Critical Inductance in Voltage Regulator Modules", in Proceedings of the IEEE 2002 Applied Power Electronics Conference, APEC '02
3. M. Zhang, M. Jovanovic and F.C. Lee, "Design Considerations for Low Voltage On-Board DC-DC Modules for Next Generations of Data Processing Circuits", in IEEE Transactions on Power Electronics, volume: 11, issue: 2, March 1996, pp. 328-337.
4. Xunwei Zhou, Pit-Leong Wong, Peng Xu, Lee, F.C., Huang, A.Q. "Investigation of candidate VRM topologies for future microprocessors" in IEEE Transactions on Power Electronics, Volume: 15 Issue: 6, Nov 2000, Page(s): 1172-1182
5. Kaiwei Yao, Yu Meng, Peng Xu and F.C. Lee, "Design Considerations for VRM Transient Response Based on the Output Impedance", in Proceedings of the IEEE Applied Power Electronics Conference, APEC'02