Characterization of patterned low-k film delamination during CMP for the 32nm-node Cu/ultra low-k (k= 1.6-1.8) integration

Proceedings of the IEEE 2004 International Interconnect Technology Conference

Volumn , Issue , 2004, Pages 239-241

  Yoon, B U ^a   Kondo, S ^a   Tokitoh, S ^a   Namiki, A ^b   Misawa, K ^a   Inukai, K ^a   Ohashi, N ^a   Kobayashi, N ^a  

^a SEMICONDUCTOR LEADING EDGE TECHNOLOGIES INC   (Japan)

^b Novellus Systems Japan Inc   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CHEMICAL MECHANICAL POLISHING; LAMINATING; METHANOL; OPTICAL INTERCONNECTS; SHEAR STRESS; SILICON WAFERS;

ASHING DAMAGE; LOW-K FILMS; PATTERN DENSITY; PLANARIZATION;

DIELECTRIC FILMS;

EID: 8644229421     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)

1. S. Lin, et al, Proc. IITC, p. 146 (2001).
2. S. Kondo et al., Proc. IEDM, p. 151 (2003).
3. S. Kondo et al., Proc. IITC, p. 86 (2003).