-
1
-
-
33845318372
-
Effective Thermal Design for Electronic Systems
-
Belady, C. L., and Minichiello, A., 2003, "Effective Thermal Design for Electronic Systems," Electronics Cooling, 9(2), pp. 16-21.
-
(2003)
Electronics Cooling
, vol.9
, Issue.2
, pp. 16-21
-
-
Belady, C.L.1
Minichiello, A.2
-
3
-
-
0030129692
-
PCB Leapfrogs into System-Level Design
-
Glover, R., 1996, "PCB Leapfrogs into System-Level Design," Electronic Design, 44(7), pp. 83-84.
-
(1996)
Electronic Design
, vol.44
, Issue.7
, pp. 83-84
-
-
Glover, R.1
-
4
-
-
0032118737
-
Analyzing Packaging Trade-Offs During System Design
-
Sandborn, P. A., and Vertal, M., 1998, "Analyzing Packaging Trade-Offs During System Design," IEEE Design & Test of Computers, 15(3), pp. 10-19.
-
(1998)
IEEE Design & Test of Computers
, vol.15
, Issue.3
, pp. 10-19
-
-
Sandborn, P.A.1
Vertal, M.2
-
5
-
-
0002425218
-
The Need for a Change in Thermal Design Philosophy
-
Lasance, C. J. M., 1995, "The Need for a Change in Thermal Design Philosophy," Electronics Cooling, 1(2), pp. 24-26.
-
(1995)
Electronics Cooling
, vol.1
, Issue.2
, pp. 24-26
-
-
Lasance, C.J.M.1
-
6
-
-
0032307030
-
The Role of Physical Implementation in Virtual Prototyping of Electronic Systems
-
Lindell, M., Stoaks, P., Carey, D., and Sandborn, P., 1998, "The Role of Physical Implementation in Virtual Prototyping of Electronic Systems," IEEE Trans. Comp. Packag. Technol. A, 21, pp. 611-616.
-
(1998)
IEEE Trans. Comp. Packag. Technol. A
, vol.21
, pp. 611-616
-
-
Lindell, M.1
Stoaks, P.2
Carey, D.3
Sandborn, P.4
-
7
-
-
0345959890
-
Virtual Thermo-Mechanical Prototyping of Microelectronics Products - Towards Optimized Designing in Reliability
-
Zhang, G. Q., Bisschop, J., and Maessen, P., 2001, "Virtual Thermo-Mechanical Prototyping of Microelectronics Products - Towards Optimized Designing in Reliability," Advancing Microelectronics, 28(1).
-
(2001)
Advancing Microelectronics
, vol.28
, Issue.1
-
-
Zhang, G.Q.1
Bisschop, J.2
Maessen, P.3
-
8
-
-
85014561427
-
Technical Brief: Solve Thermal Issues Earlier in Updated Board Designs
-
Francois-Saint-Cyr, A., 2005, "Technical Brief: Solve Thermal Issues Earlier in Updated Board Designs," Electronics Cooling, 11(1), pp. 36-38.
-
(2005)
Electronics Cooling
, vol.11
, Issue.1
, pp. 36-38
-
-
Francois-Saint-Cyr, A.1
-
9
-
-
0029235550
-
Trends in Electronic Mechanical CAD Integration
-
Maui, HI
-
Fulton, R. E., 1995, "Trends in Electronic Mechanical CAD Integration," Proc. ASME InterPACK, Maui, HI.
-
(1995)
Proc. ASME InterPACK
-
-
Fulton, R.E.1
-
10
-
-
0032302294
-
METHODIC: A New CAD for Electrothermal Coupling Simulation in Power Converters
-
Aachen, Germany
-
Coulibaly, I., 1998, "METHODIC: A New CAD for Electrothermal Coupling Simulation in Power Converters," Proc. Industrial Electronics Conference, Aachen, Germany.
-
(1998)
Proc. Industrial Electronics Conference
-
-
Coulibaly, I.1
-
11
-
-
0029701354
-
Performing Design for Environment Concurrent with Interdisciplinary Tradeoff Analysis of Electronic Systems
-
Dallas, TX
-
Sandborn, P. A., and McFall, G., 1996, "Performing Design for Environment Concurrent with Interdisciplinary Tradeoff Analysis of Electronic Systems," Proc. ISEE-1996, Dallas, TX.
-
(1996)
Proc. ISEE-1996
-
-
Sandborn, P.A.1
McFall, G.2
-
12
-
-
0034309401
-
Electrothermal Modelling of GaAs MESFETs
-
Pesare, M., Giorgio, A., Passaro, V. M. N., and Perri, A. G., 2000, "Electrothermal Modelling of GaAs MESFETs," Int. J. Electronics, 87(10), pp. 1163-1170.
-
(2000)
Int. J. Electronics
, vol.87
, Issue.10
, pp. 1163-1170
-
-
Pesare, M.1
Giorgio, A.2
Passaro, V.M.N.3
Perri, A.G.4
-
13
-
-
0029218470
-
Package Design Advisor - Mechanical, Electrical and Thermal Analysis in One CAD Tool
-
Las Vegas, NV
-
Choksi, G., Immaneni, L., Karunakaran, R., Lin, Y. C., Stys, D., and Wyllie, M., 1995, "Package Design Advisor - Mechanical, Electrical and Thermal Analysis in One CAD Tool," Proc. IEEE Electronic Components & Technology, Las Vegas, NV.
-
(1995)
Proc. IEEE Electronic Components & Technology
-
-
Choksi, G.1
Immaneni, L.2
Karunakaran, R.3
Lin, Y.C.4
Stys, D.5
Wyllie, M.6
-
14
-
-
0030781420
-
CAD Tools for AreaDistributed I/O Pad Packaging
-
97, Santa Cruz, CA
-
Farbarik, R., Liu, X., Rossman, M., Parakh, P., Basso, T., and Brown, R., 1997, "CAD Tools for AreaDistributed I/O Pad Packaging," Proc. IEEE MCMC '97, Santa Cruz, CA.
-
(1997)
Proc. IEEE MCMC
-
-
Farbarik, R.1
Liu, X.2
Rossman, M.3
Parakh, P.4
Basso, T.5
Brown, R.6
-
15
-
-
1842683309
-
Early Analysis of Chip Scale Package Design Trade-Offs
-
Santa Cruz, CA
-
Blood, W., and Lai, A., 1998, "Early Analysis of Chip Scale Package Design Trade-Offs," Proc. IEEE IC/Package Design Integration, Santa Cruz, CA.
-
(1998)
Proc. IEEE IC/Package Design Integration
-
-
Blood, W.1
Lai, A.2
-
16
-
-
0031334734
-
ViperBGA: A Novel Design Approach to High Performance and High Density BGA's
-
Wu, P., Chen, K., and Tzou, J., 1997, "ViperBGA: A Novel Design Approach to High Performance and High Density BGA's," Proc. Electron. Manufact. Technol. Symp.
-
(1997)
Proc. Electron. Manufact. Technol. Symp
-
-
Wu, P.1
Chen, K.2
Tzou, J.3
-
17
-
-
85072474213
-
Integration of Liquid Cooling Thermal and Thermomechanical Design for the Lifetime Prediction of Electrical Power Modules
-
Detroit, MI
-
Wilde, J., Staiger, W., Thoben, M., Schuch, B., and Kilian, H., 1998, "Integration of Liquid Cooling Thermal and Thermomechanical Design for the Lifetime Prediction of Electrical Power Modules," Proc. SAE Int. Congress & Exposition, Detroit, MI.
-
(1998)
Proc. SAE Int. Congress & Exposition
-
-
Wilde, J.1
Staiger, W.2
Thoben, M.3
Schuch, B.4
Kilian, H.5
-
18
-
-
0034853493
-
Integrated Design and Simulation for Millimeter-Wave Antenna Systems
-
Big Sky, MT
-
Cwik, T., Katz, D. S., and Villegas, F., 2001, "Integrated Design and Simulation for Millimeter-Wave Antenna Systems," Proc. IEEE Aerospace Conf., Big Sky, MT.
-
(2001)
Proc. IEEE Aerospace Conf
-
-
Cwik, T.1
Katz, D.S.2
Villegas, F.3
-
19
-
-
84886853743
-
Thermal Computer Aided Design-Advancing the Revolution in Compact Motors
-
Staton, D. A., 2001, "Thermal Computer Aided Design-Advancing the Revolution in Compact Motors," Proc. Electric Machines and Drives Conf.
-
(2001)
Proc. Electric Machines and Drives Conf
-
-
Staton, D.A.1
-
20
-
-
0032653403
-
Integrated Multidisciplinary CAD/CAE Environment for Micro-Electro-Mechanical Systems (MEMS)
-
Soc. Opt. Eng, Paris, France
-
Przekwas, A., 1999, "Integrated Multidisciplinary CAD/CAE Environment for Micro-Electro-Mechanical Systems (MEMS)," Proc. SPIE Int. Soc. Opt. Eng., Paris, France.
-
(1999)
Proc. SPIE Int
-
-
Przekwas, A.1
-
21
-
-
0032676708
-
CFD-ACE+MEMS: A CAD System for Simulation and Modeling of MEMS
-
Soc. Opt. Eng, Paris, France
-
Stout, P., Yang, H. Q., Dionne, P., Leonard, A., Tan, Z., Przekwas, A., and Krishnan, A., 1999, "CFD-ACE+MEMS: A CAD System for Simulation and Modeling of MEMS," Proc. SPIE Int. Soc. Opt. Eng., Paris, France.
-
(1999)
Proc. SPIE Int
-
-
Stout, P.1
Yang, H.Q.2
Dionne, P.3
Leonard, A.4
Tan, Z.5
Przekwas, A.6
Krishnan, A.7
-
22
-
-
34249820852
-
CAD-Based Analysis Tools for Electronic Packaging Design (a New Modeling Methodology for a Virtual Development Environment)
-
Kohala Coast, HI
-
Zhou, W. X., Hsiung, C. H., Fulton, R. E., Yin, X. F., Yeh, C. P., and Wyatt, K., 1997, "CAD-Based Analysis Tools for Electronic Packaging Design (a New Modeling Methodology for a Virtual Development Environment)," Proc. ASME InterPACK, Kohala Coast, HI.
-
(1997)
Proc. ASME InterPACK
-
-
Zhou, W.X.1
Hsiung, C.H.2
Fulton, R.E.3
Yin, X.F.4
Yeh, C.P.5
Wyatt, K.6
-
23
-
-
0004120818
-
Modularized & Parametric Modeling Methodology for Concurrent Mechanical Design of Electronic Packaging,
-
Ph. D. thesis, Georgia Inst. of Tech, Atlanta, GA
-
Zhou, W. X., 1997, "Modularized & Parametric Modeling Methodology for Concurrent Mechanical Design of Electronic Packaging," Ph. D. thesis, Georgia Inst. of Tech., Atlanta, GA.
-
(1997)
-
-
Zhou, W.X.1
-
24
-
-
0032141012
-
CAD Challenges for Microsensors, Microactuators, and Microsystems
-
Senturia, S. D., 1998, "CAD Challenges for Microsensors, Microactuators, and Microsystems," Proc. IEEE, 86, pp. 1611-1626.
-
(1998)
Proc. IEEE
, vol.86
, pp. 1611-1626
-
-
Senturia, S.D.1
-
25
-
-
0032000190
-
-
Mater. Sci. Eng. B Solid State Adv. Technol, B511-3, pp
-
Courtois, B., Karam, J. M., Lubaszewski, M., Szekely, V., Rencz, M., Holmann, K., and Glesner, M., 1998, "CAD Tools and Foundries to Boost Microsystems Development," Mater. Sci. Eng. B Solid State Adv. Technol., B51(1-3), pp. 242-253.
-
(1998)
CAD Tools and Foundries to Boost Microsystems Development
, pp. 242-253
-
-
Courtois, B.1
Karam, J.M.2
Lubaszewski, M.3
Szekely, V.4
Rencz, M.5
Holmann, K.6
Glesner, M.7
-
26
-
-
0035726218
-
Global Modeling and Simulation of System-on-Chip Embedding MEMS Devices
-
Shanghai, China
-
Juneidi, Z., Torki, K., Martinez, S., Nicolescu, G., Courtois, B., and Jerraya, A., 2001, "Global Modeling and Simulation of System-on-Chip Embedding MEMS Devices," Proc. IEEE Int. ASIC Conf., Shanghai, China.
-
(2001)
Proc. IEEE Int. ASIC Conf
-
-
Juneidi, Z.1
Torki, K.2
Martinez, S.3
Nicolescu, G.4
Courtois, B.5
Jerraya, A.6
-
27
-
-
0032735755
-
Design and Test of MEMS
-
Goa, India
-
Courtois, B., Karam, J. M., Mir, S., Lubaszewski, M., Szekely, V., Rencz, M., Hofmann, K., and Glesner, M., 1999, "Design and Test of MEMS," Proc. IEEE Int. Conf. on VLSI Design, Goa, India.
-
(1999)
Proc. IEEE Int. Conf. on VLSI Design
-
-
Courtois, B.1
Karam, J.M.2
Mir, S.3
Lubaszewski, M.4
Szekely, V.5
Rencz, M.6
Hofmann, K.7
Glesner, M.8
-
28
-
-
6444244449
-
Efforts in Developing Design and Simulation Tools for MEMS: DS/MEMS and CA/MEMS
-
Cannes, France
-
Youn, S.-K., Kwak, B., Kwon, J.-H., Chang, S.-Y., Huh, J., and Kim, E., 2002, "Efforts in Developing Design and Simulation Tools for MEMS: DS/MEMS and CA/MEMS," Proc. SPIE Design, Test, Integration, and packaging of MEMS/MOEMS, Cannes, France.
-
(2002)
Proc. SPIE Design, Test, Integration, and packaging of MEMS/MOEMS
-
-
Youn, S.-K.1
Kwak, B.2
Kwon, J.-H.3
Chang, S.-Y.4
Huh, J.5
Kim, E.6
-
29
-
-
0032298936
-
Integrated Mixed-Technology Design Environment to Support Micro Electro Mechanical Systems Development
-
Santa Clara, CA
-
Karam, J. M., Courtois, B., Cao, A., and Hofmann, K., 1998, "Integrated Mixed-Technology Design Environment to Support Micro Electro Mechanical Systems Development," Proc. SPIE Micromachined Devices and Components IV, Santa Clara, CA.
-
(1998)
Proc. SPIE Micromachined Devices and Components
, vol.4
-
-
Karam, J.M.1
Courtois, B.2
Cao, A.3
Hofmann, K.4
-
30
-
-
0033704694
-
Moving from Analysis to Design: A MEMS CAD Tool Evolution
-
Paris, France
-
Liateni, K., Lee, H. J., Maher, M. A., and Karam, J. M., 2000, "Moving from Analysis to Design: A MEMS CAD Tool Evolution," Proc. SPIE Design, Test, Integration, and packaging of MEMS/MOEMS, Paris, France.
-
(2000)
Proc. SPIE Design, Test, Integration, and packaging of MEMS/MOEMS
-
-
Liateni, K.1
Lee, H.J.2
Maher, M.A.3
Karam, J.M.4
-
31
-
-
85196536953
-
Coupled 3D Electromagnetic, Structural, and Thermal Finite Element Analysis as Integral Components of Electronic Product Design
-
Anaheim, CA
-
Brauer, J. R., and Wallen, P., 1996, "Coupled 3D Electromagnetic, Structural, and Thermal Finite Element Analysis as Integral Components of Electronic Product Design," Proc. IEEE WESCON/96, Anaheim, CA.
-
(1996)
Proc. IEEE WESCON/96
-
-
Brauer, J.R.1
Wallen, P.2
-
32
-
-
0031344018
-
Thermal/EMC Optimization of Airborne Electronic Racks
-
San Diego, CA
-
Assouad, Y., Etienne, P., and Labaune, G., 1997, "Thermal/EMC Optimization of Airborne Electronic Racks," Proc. Int. Syst. Packag Symp., San Diego, CA.
-
(1997)
Proc. Int. Syst. Packag Symp
-
-
Assouad, Y.1
Etienne, P.2
Labaune, G.3
-
33
-
-
0036130342
-
Reliability, Thermal Analysis and Optimization Wirability Design of Multi-Layer PCB Boards
-
Seattle, WA
-
Tian, X., and Palusinski, O. A., 2002, "Reliability, Thermal Analysis and Optimization Wirability Design of Multi-Layer PCB Boards," Proc. IEEE Rel. & Maintainability Symp., Seattle, WA.
-
(2002)
Proc. IEEE Rel. & Maintainability Symp
-
-
Tian, X.1
Palusinski, O.A.2
-
34
-
-
0034317482
-
Optimal Design of Electronic System Utilizing an Integrated Multidisciplinary Process
-
Mottahed, B. D., and Manoochehri, S., 2000, "Optimal Design of Electronic System Utilizing an Integrated Multidisciplinary Process," IEEE Trans. Adv. Packag., 23, pp. 699-707.
-
(2000)
IEEE Trans. Adv. Packag
, vol.23
, pp. 699-707
-
-
Mottahed, B.D.1
Manoochehri, S.2
-
35
-
-
0036444551
-
Volumetric Optimal Design of Passive Integrated Power Electronic Module (IPEM) for Distributed Power System (DPS) Front-End DC/DC Converter
-
Chen, R., Canales, F., Yang, B., and van Wyk, J. D., 2002, "Volumetric Optimal Design of Passive Integrated Power Electronic Module (IPEM) for Distributed Power System (DPS) Front-End DC/DC Converter," Conf. Record IEEE IAS, 3, pp. 1758-1765.
-
(2002)
Conf. Record IEEE IAS
, vol.3
, pp. 1758-1765
-
-
Chen, R.1
Canales, F.2
Yang, B.3
van Wyk, J.D.4
-
36
-
-
0036446147
-
Volume Optimization of a PFC Flyback Structure under Electromagnetic Compatibility, Loss and Temperature Constraints
-
Australia
-
Larouci, C., Ferrieux, J. P., Gerbaud, L., Roudet, J., and Keradec, J. P., 2002, "Volume Optimization of a PFC Flyback Structure under Electromagnetic Compatibility, Loss and Temperature Constraints," Proc. IEEE Power Electron. Specialists Conf., Cairns, Australia.
-
(2002)
Proc. IEEE Power Electron. Specialists Conf., Cairns
-
-
Larouci, C.1
Ferrieux, J.P.2
Gerbaud, L.3
Roudet, J.4
Keradec, J.P.5
-
37
-
-
0031144539
-
Optimized Design of a Complete Three-Phase PWM-VS Inverter
-
Blaabjerg, F., and Pedersen, J. K., 1997, "Optimized Design of a Complete Three-Phase PWM-VS Inverter," IEEE Trans. Power Electron., 12(3), pp. 567-577.
-
(1997)
IEEE Trans. Power Electron
, vol.12
, Issue.3
, pp. 567-577
-
-
Blaabjerg, F.1
Pedersen, J.K.2
-
38
-
-
85196505481
-
Optimization of the Arcticooler for Lowest Thermal Resistance in a Minimum Volume
-
Las Vegas, NV
-
Wagner, G. R., 2000, "Optimization of the Arcticooler for Lowest Thermal Resistance in a Minimum Volume," Proc. ITHERM, Las Vegas, NV.
-
(2000)
Proc. ITHERM
-
-
Wagner, G.R.1
-
39
-
-
0034829720
-
Optimization of the Fan-Heat Sink Systems in Portable Electronics Environment
-
Santa Clara, CA
-
Loh, C. K., Nelson, D., and Chou, D. J., 2001, "Optimization of the Fan-Heat Sink Systems in Portable Electronics Environment," Proc. SPIE HD Int. Conf. on High-Density Interconnect and Systems Packag., Santa Clara, CA.
-
(2001)
Proc. SPIE HD Int. Conf. on High-Density Interconnect and Systems Packag
-
-
Loh, C.K.1
Nelson, D.2
Chou, D.J.3
-
40
-
-
0034473304
-
Integrated EMI/Thermal Design for Switching Power Supplies
-
Zhang, W., Lee, F. C., and Chen, D. Y., 2000, "Integrated EMI/Thermal Design for Switching Power Supplies," Proc. Power Electron. Specialists Conf.
-
(2000)
Proc. Power Electron. Specialists Conf
-
-
Zhang, W.1
Lee, F.C.2
Chen, D.Y.3
-
41
-
-
29244487927
-
Structure Optimization of Trench-Isolated SiGe HBTs for Simultaneous Improvements in Thermal and Electrical Performances
-
Rieh, J.-S., Greenberg, D., Liu, Q., Joseph, A. J., Freeman, G., and Ahlgren, D. C., 2005, "Structure Optimization of Trench-Isolated SiGe HBTs for Simultaneous Improvements in Thermal and Electrical Performances," IEEE Trans. Electron Devices, 52(12), pp. 2744-2752.
-
(2005)
IEEE Trans. Electron Devices
, vol.52
, Issue.12
, pp. 2744-2752
-
-
Rieh, J.-S.1
Greenberg, D.2
Liu, Q.3
Joseph, A.J.4
Freeman, G.5
Ahlgren, D.C.6
-
42
-
-
33748531287
-
Temperature-Dependent Optimization of Cache Leakage Power Dissipation
-
Li, P., Deng, Y., and Pileggi, L. T., 2005, "Temperature-Dependent Optimization of Cache Leakage Power Dissipation," Proc. Int. Conf. Computer Design
-
(2005)
Proc. Int. Conf. Computer Design
-
-
Li, P.1
Deng, Y.2
Pileggi, L.T.3
-
44
-
-
0035058069
-
Integrated Electrical and Thermal Analysis of Integrated Power Electronics Modules Using iSIGHT
-
Anaheim, CA
-
Chen, J. Z., Wu, Y., Gence, C., Boroyevich, D., and Bohn, J. H., 2001, "Integrated Electrical and Thermal Analysis of Integrated Power Electronics Modules Using iSIGHT," Proc. IEEE APEC, Anaheim, CA.
-
(2001)
Proc. IEEE APEC
-
-
Chen, J.Z.1
Wu, Y.2
Gence, C.3
Boroyevich, D.4
Bohn, J.H.5
-
45
-
-
67349183501
-
Solder Joint Reliability Optimization
-
Singapore
-
Stoyanov, S., Bailey, C., Lu, H., and Cross, M., 2001, "Solder Joint Reliability Optimization," Proc. APACK, Singapore.
-
(2001)
Proc. APACK
-
-
Stoyanov, S.1
Bailey, C.2
Lu, H.3
Cross, M.4
-
46
-
-
3242812673
-
Integrated Computational Mechanics and Optimization for Design of Electronic Components
-
Parmee, I. C. and Hajela, P, eds, Springer-Verlag, London, pp
-
Stoyanov, S., Bailey, C., Lu, H., and Cross, M. 2002, "Integrated Computational Mechanics and Optimization for Design of Electronic Components," Optimization in Industry, Parmee, I. C. and Hajela, P., eds., Springer-Verlag, London, pp. 57-70.
-
(2002)
Optimization in Industry
, pp. 57-70
-
-
Stoyanov, S.1
Bailey, C.2
Lu, H.3
Cross, M.4
-
47
-
-
85196537919
-
-
Hadim, H., and Suwa, T., 2005, A Multidisciplinary Design and Optimization Methodology for Ball Grid Array Packages Using Artificial Neural Networks, ASME J. Electro. Packag., 127(3), pp. 306-313.
-
Hadim, H., and Suwa, T., 2005, "A Multidisciplinary Design and Optimization Methodology for Ball Grid Array Packages Using Artificial Neural Networks," ASME J. Electro. Packag., 127(3), pp. 306-313.
-
-
-
-
48
-
-
3042517226
-
Thermal and Power Integrity Based Power/Ground Networks Optimization
-
Wang, T.-Y., Tsai, J.-L., and Chung-Ping Chen, C., 2004, "Thermal and Power Integrity Based Power/Ground Networks Optimization," Proc. Design, Automation and Test in Europe Conf. and Exhibition
-
(2004)
Proc. Design, Automation and Test in Europe Conf. and Exhibition
-
-
Wang, T.-Y.1
Tsai, J.-L.2
Chung-Ping Chen, C.3
-
49
-
-
0029547766
-
Thermal Based Micro Flow Sensor Optimization Using Coupled Electrothermal Numerical Simulations
-
Stockholm, Sweden
-
Nagata, M., Swart, N., Stevens, M., and Nathan, A., 1995, "Thermal Based Micro Flow Sensor Optimization Using Coupled Electrothermal Numerical Simulations," Proc. Int. Conf. on Solid-State Sensors and Actuators, and Eurosensors, Stockholm, Sweden.
-
(1995)
Proc. Int. Conf. on Solid-State Sensors and Actuators, and Eurosensors
-
-
Nagata, M.1
Swart, N.2
Stevens, M.3
Nathan, A.4
-
50
-
-
0037275142
-
Optimization of Synthetic Jet Cooling for Microelectronics Applications
-
San Jose, CA
-
Beratlis, N., and Smith, M. K., 2003, "Optimization of Synthetic Jet Cooling for Microelectronics Applications," Proc. IEEE SEMI-THERM, San Jose, CA.
-
(2003)
Proc. IEEE SEMI-THERM
-
-
Beratlis, N.1
Smith, M.K.2
-
51
-
-
0037233298
-
Analysis and Design Optimization of Front-End Passive Components for Voltage Source Inverters
-
Miami Beach, FL
-
Chen, G., Rentzch, M., Wang, F., Boroyevich, D., Ragon, S., Stefanovic, V., and Arpilliere, M., 2003, "Analysis and Design Optimization of Front-End Passive Components for Voltage Source Inverters," Proc. IEEE APEC, Miami Beach, FL.
-
(2003)
Proc. IEEE APEC
-
-
Chen, G.1
Rentzch, M.2
Wang, F.3
Boroyevich, D.4
Ragon, S.5
Stefanovic, V.6
Arpilliere, M.7
-
52
-
-
0029227252
-
Towards Enhancing the Life of Plastic Power Packages Using Design Optimization
-
Maui, HI
-
Rajan, S. D., and Nagaraj, B., 1995, "Towards Enhancing the Life of Plastic Power Packages Using Design Optimization," Proc. ASME InterPACK, Maui, HI.
-
(1995)
Proc. ASME InterPACK
-
-
Rajan, S.D.1
Nagaraj, B.2
-
53
-
-
0037399882
-
Integrated Design Method for Flip Chip CSP with Electrical, Thermal and Thermo-Mechanical Qualifications
-
Liu, D.-S., Ni, C.-Y., and Chen, C.-Y., 2003, "Integrated Design Method for Flip Chip CSP with Electrical, Thermal and Thermo-Mechanical Qualifications," Finite Elements in Analysis and Design, 39(7), pp. 661-677.
-
(2003)
Finite Elements in Analysis and Design
, vol.39
, Issue.7
, pp. 661-677
-
-
Liu, D.-S.1
Ni, C.-Y.2
Chen, C.-Y.3
-
54
-
-
6344282821
-
A Simulation-Based Multi-Objective Design Optimization of Electronic Packages under Thermal Cycling and Bending
-
Xu, L., Reinikainen, T., Ren, W., Wang, B. P., Han, Z., and Agonafer, D., 2004, "A Simulation-Based Multi-Objective Design Optimization of Electronic Packages under Thermal Cycling and Bending," Microelectronics Reliability, 44(12), pp. 1977-1983.
-
(2004)
Microelectronics Reliability
, vol.44
, Issue.12
, pp. 1977-1983
-
-
Xu, L.1
Reinikainen, T.2
Ren, W.3
Wang, B.P.4
Han, Z.5
Agonafer, D.6
-
55
-
-
21544443441
-
Integrated Thermomechanical Design and Optimization of BGA Packages Using Genetic Algorithm
-
Charlotte, NC
-
Hadim, H. A., and Suwa, T., 2004, "Integrated Thermomechanical Design and Optimization of BGA Packages Using Genetic Algorithm," Proc. ASME Heat Transfer/Fulids Engineering Summer Conf., Charlotte, NC.
-
(2004)
Proc. ASME Heat Transfer/Fulids Engineering Summer Conf
-
-
Hadim, H.A.1
Suwa, T.2
-
56
-
-
0035058707
-
Numerical Optimization of a Power Electronics Cooling Assembly
-
Anaheim, CA
-
Xiong, G., Lu, M., Chen, C.-L., Wang, B. P., and Kehl, D., 2001, "Numerical Optimization of a Power Electronics Cooling Assembly," Proc. IEEE APEC, Anaheim, CA.
-
(2001)
Proc. IEEE APEC
-
-
Xiong, G.1
Lu, M.2
Chen, C.-L.3
Wang, B.P.4
Kehl, D.5
-
57
-
-
23844508163
-
Geometric Optimization of Thermoelectric Coolers in a Confined Volume Using Genetic Algorithms
-
Cheng, Y.-H., and Lin, W.-K., 2005, "Geometric Optimization of Thermoelectric Coolers in a Confined Volume Using Genetic Algorithms," Applied Thermal Engineering, 25(17-18), pp. 2983-2997.
-
(2005)
Applied Thermal Engineering
, vol.25
, Issue.17-18
, pp. 2983-2997
-
-
Cheng, Y.-H.1
Lin, W.-K.2
-
58
-
-
85169430342
-
Optimization of Solder Joint Fatigue Life Using Product Model-Based Analysis Models
-
Atlanta, GA
-
Cimtalay, S., Peak, R. S., and Fulton, R. E., 1996, "Optimization of Solder Joint Fatigue Life Using Product Model-Based Analysis Models," Proc. ASME Int. Mech. Eng. Congress & Exposition, Atlanta, GA.
-
(1996)
Proc. ASME Int. Mech. Eng. Congress & Exposition
-
-
Cimtalay, S.1
Peak, R.S.2
Fulton, R.E.3
-
59
-
-
0035788899
-
Integrating Computational Mechanics and Numerical Optimization for the Design of Material Properties in Electronic Packages
-
San Diego, CA
-
Stoyanov, S., Bailey, C., and Cross, M., 2001, "Integrating Computational Mechanics and Numerical Optimization for the Design of Material Properties in Electronic Packages," Proc. Conf. on Computational Modeling of Materials, Minerals and Metals, San Diego, CA.
-
(2001)
Proc. Conf. on Computational Modeling of Materials, Minerals and Metals
-
-
Stoyanov, S.1
Bailey, C.2
Cross, M.3
-
60
-
-
0036240551
-
Optimisation Modelling for Flip-Chip Solder Joint Reliability
-
Stoyanov, S., Bailey, C., and Cross, M., 2002, "Optimisation Modelling for Flip-Chip Solder Joint Reliability," Soldering and Surface Mount Technology, 14(1), pp. 49-58.
-
(2002)
Soldering and Surface Mount Technology
, vol.14
, Issue.1
, pp. 49-58
-
-
Stoyanov, S.1
Bailey, C.2
Cross, M.3
-
61
-
-
52649098410
-
Optimization Tools for Flip-Chip Design
-
Kauai, HI
-
Stoyanov, S., Bailey, C., and Lu, H., 2001, "Optimization Tools for Flip-Chip Design," Proc. ASME InterPACK, Kauai, HI.
-
(2001)
Proc. ASME InterPACK
-
-
Stoyanov, S.1
Bailey, C.2
Lu, H.3
-
62
-
-
58849146545
-
Optimisation and Finite Element Analysis for Reliable Electronic Packaging
-
Aix-en-Provence, France
-
Stoyanov, S., and Bailey, C., 2003, "Optimisation and Finite Element Analysis for Reliable Electronic Packaging," Proc. EuroSIME, Aix-en-Provence, France.
-
(2003)
Proc. EuroSIME
-
-
Stoyanov, S.1
Bailey, C.2
-
63
-
-
0029727189
-
Simulation and Design Optimization of Microsystems Based on Standard Simulators and Adaptive Search Techniques
-
Meinzer, S., Quinte, A., Gorges-Schleuter, M., Jakob, W., Suss, W., and Eggert, H., 1996, "Simulation and Design Optimization of Microsystems Based on Standard Simulators and Adaptive Search Techniques," Proc. Design Automation Confer.
-
(1996)
Proc. Design Automation Confer
-
-
Meinzer, S.1
Quinte, A.2
Gorges-Schleuter, M.3
Jakob, W.4
Suss, W.5
Eggert, H.6
-
64
-
-
0141952928
-
Design Optimization of a Switched Reluctance Motor by Electromagnetic and Thermal Finite-Element Analysis
-
Wu, W., Dunlop, J. B., Collocott, S. J., and Kalan, B. A., 2003, "Design Optimization of a Switched Reluctance Motor by Electromagnetic and Thermal Finite-Element Analysis," IEEE Trans. Magn., 39(5), pp. 3334-3336.
-
(2003)
IEEE Trans. Magn
, vol.39
, Issue.5
, pp. 3334-3336
-
-
Wu, W.1
Dunlop, J.B.2
Collocott, S.J.3
Kalan, B.A.4
-
65
-
-
33749074329
-
Optimizing the Design and Performance of a Switched Reluctance Machine Using Lumped Parameter Thermal Model
-
Momen, M. F., and Husain, I., 2003, "Optimizing the Design and Performance of a Switched Reluctance Machine Using Lumped Parameter Thermal Model," Proc. Int. Electric Machines and Drives Conf.
-
(2003)
Proc. Int. Electric Machines and Drives Conf
-
-
Momen, M.F.1
Husain, I.2
-
66
-
-
29644440023
-
Optimization of Vortex Promoter Design Using a Dynamic Data Driven Approach
-
San Francisco, CA, United States
-
Icoz, T., and Jaluria, Y., 2005, "Optimization of Vortex Promoter Design Using a Dynamic Data Driven Approach," Proc. ASME Summer Heat Transfer Conf., San Francisco, CA, United States.
-
(2005)
Proc. ASME Summer Heat Transfer Conf
-
-
Icoz, T.1
Jaluria, Y.2
-
67
-
-
32844474349
-
Mathematical Optimization of Electronic Enclosures
-
San Francisco, CA
-
De Kock, D. J., Visser, J. A., Nair, R., Nagulapally, M., and Nigen, J., 2005, "Mathematical Optimization of Electronic Enclosures," Proc. ASME InterPACK, San Francisco, CA.
-
(2005)
Proc. ASME InterPACK
-
-
De Kock, D.J.1
Visser, J.A.2
Nair, R.3
Nagulapally, M.4
Nigen, J.5
-
68
-
-
0030409141
-
Global Approximation Concepts for Optimal Design of Electronic Packages
-
Atlanta, GA
-
Deshpande, A. M., Subbarayan, G., and Mahajan, R. L., 1996, "Global Approximation Concepts for Optimal Design of Electronic Packages," Proc. ASME Int. Mec. Eng. Congress & Exhibition, Atlanta, GA.
-
(1996)
Proc. ASME Int. Mec. Eng. Congress & Exhibition
-
-
Deshpande, A.M.1
Subbarayan, G.2
Mahajan, R.L.3
-
69
-
-
0032046304
-
Optimization for Thermal and Electrical Wiring for a Flip-Chip Package Using Physical-Neural Network Modeling
-
Calmidi, V. V., and Mahajan, R. L., 1998, "Optimization for Thermal and Electrical Wiring for a Flip-Chip Package Using Physical-Neural Network Modeling," IEEE Trans. Comp. Packag. Technol. C, 21(2), pp. 111-117.
-
(1998)
IEEE Trans. Comp. Packag. Technol. C
, vol.21
, Issue.2
, pp. 111-117
-
-
Calmidi, V.V.1
Mahajan, R.L.2
-
70
-
-
34249783201
-
Dealing with Uncertainty in Power Loss Estimates in Thermal Design of Power Electronic Circuits
-
Phoenix, AZ
-
Sridhar, S., and Eggink, H. J., 1999, "Dealing with Uncertainty in Power Loss Estimates in Thermal Design of Power Electronic Circuits," Proc. Industry Applications Conference, Phoenix, AZ.
-
(1999)
Proc. Industry Applications Conference
-
-
Sridhar, S.1
Eggink, H.J.2
-
71
-
-
85196500241
-
-
Zhang, G. Q., Tay, A. A. O., Ernst, L. J., Liu, S., Qian, Z. F., Bressers, H. J. L., and Janssen, J., 2001, Virtual Thermo-Mechanical Prototyping of Electronic Packaging Challenges in Material Characterization and Modeling, Proc. Electronic Components and Technology Conf., Orlando, FL.
-
Zhang, G. Q., Tay, A. A. O., Ernst, L. J., Liu, S., Qian, Z. F., Bressers, H. J. L., and Janssen, J., 2001, "Virtual Thermo-Mechanical Prototyping of Electronic Packaging Challenges in Material Characterization and Modeling," Proc. Electronic Components and Technology Conf., Orlando, FL.
-
-
-
-
72
-
-
29644438446
-
Thermal Stress Reduction and Optimization for Orthotropic Composite Boards
-
San Francisco, CA
-
Khalilollahi, A., and Warley, R. L., 2005, "Thermal Stress Reduction and Optimization for Orthotropic Composite Boards," Proc. ASME Summer Heat Transfer Conf., San Francisco, CA.
-
(2005)
Proc. ASME Summer Heat Transfer Conf
-
-
Khalilollahi, A.1
Warley, R.L.2
-
73
-
-
33645036280
-
Thermal Reliability Design and Optimization for Multilayer Composite Electronic Boards
-
Orlando, FL
-
Khalilollahi, A., Warley, R. L., and Onipede, O., 2005, "Thermal Reliability Design and Optimization for Multilayer Composite Electronic Boards," Proc. ASME Int. Mech. Eng. Congress and Exposition, Orlando, FL.
-
(2005)
Proc. ASME Int. Mech. Eng. Congress and Exposition
-
-
Khalilollahi, A.1
Warley, R.L.2
Onipede, O.3
-
74
-
-
33645071339
-
Integrated Reliability Solutions for New Component Development and Designs Optimization
-
Orlando, FL
-
Wu, X., Qian, Z., and Wang, Y., 2005, "Integrated Reliability Solutions for New Component Development and Designs Optimization," Proc. ASME Int. Mech. Eng. Congress & Exposition, Orlando, FL.
-
(2005)
Proc. ASME Int. Mech. Eng. Congress & Exposition
-
-
Wu, X.1
Qian, Z.2
Wang, Y.3
-
75
-
-
85196542216
-
-
Chang, C.-L., and Lin, W.-S., 2003, Robust Multiple Criteria Optimization of Thermally Enhanced PQFP, J. Chin. Soc. Mech. Eng. Trans. Chin. Inst. Eng. Ser. C, 24(1), pp. 73-80.
-
Chang, C.-L., and Lin, W.-S., 2003, "Robust Multiple Criteria Optimization of Thermally Enhanced PQFP," J. Chin. Soc. Mech. Eng. Trans. Chin. Inst. Eng. Ser. C, 24(1), pp. 73-80.
-
-
-
-
76
-
-
85196551399
-
Macrocell Placement with Temperature Profile Optimization
-
Orlando, FL
-
Tsai, C.-H., and Kang, S.-M. S., 1999, "Macrocell Placement with Temperature Profile Optimization," Proc. ISCAS, Orlando, FL.
-
(1999)
Proc. ISCAS
-
-
Tsai, C.-H.1
Kang, S.-M.S.2
-
77
-
-
0038461800
-
Substrate Thermal Model Reduction for Efficient Transient Electrothermal Simulation
-
San Diego, CA
-
Tsai, C.-H., and Kang, S.-M., 2000, "Substrate Thermal Model Reduction for Efficient Transient Electrothermal Simulation," Proc. IEEE Mixed-Signal Design, SSMSD, San Diego, CA.
-
(2000)
Proc. IEEE Mixed-Signal Design, SSMSD
-
-
Tsai, C.-H.1
Kang, S.-M.2
-
78
-
-
0033871060
-
Cell-Level Placement for Improving Substrate Thermal Distribution
-
Tsai, C.-H., and Kang, S.-M., 2000, "Cell-Level Placement for Improving Substrate Thermal Distribution," IEEE Trans. Computer-Aided Design, 19, pp. 253-266.
-
(2000)
IEEE Trans. Computer-Aided Design
, vol.19
, pp. 253-266
-
-
Tsai, C.-H.1
Kang, S.-M.2
-
79
-
-
0038716791
-
Partition-Driven Standard Cell Thermal Placement
-
Monterey, CA
-
Chen, G., and Sapatnekar, S., 2003, "Partition-Driven Standard Cell Thermal Placement," Proc. of Int. Symp. on Physical Design, Monterey, CA.
-
(2003)
Proc. of Int. Symp. on Physical Design
-
-
Chen, G.1
Sapatnekar, S.2
-
80
-
-
33845533572
-
Multidisciplinary Heat Generating Cell Placement Optimization Using Genetic Algorithm and Artificial Neural Networks
-
San Francisco, CA
-
Suwa, T., and Hadim, H., 2006, "Multidisciplinary Heat Generating Cell Placement Optimization Using Genetic Algorithm and Artificial Neural Networks," Proc. AIAA/ASME Joint Thermophysics and Heat Transfer Conf., San Francisco, CA.
-
(2006)
Proc. AIAA/ASME Joint Thermophysics and Heat Transfer Conf
-
-
Suwa, T.1
Hadim, H.2
-
81
-
-
0347409236
-
Efficient Thermal Placement of Standard Cells in 3D ICs Using a Force Directed Approach
-
San Jose, CA
-
Goplen, B., and Sapatnekar, S., 2003, "Efficient Thermal Placement of Standard Cells in 3D ICs Using a Force Directed Approach," Proc. Int. Conf. Computer Aided Design, San Jose, CA.
-
(2003)
Proc. Int. Conf. Computer Aided Design
-
-
Goplen, B.1
Sapatnekar, S.2
-
82
-
-
84861418947
-
Wire Congestion and Thermal Aware 3D Global Placement
-
Balakrishnan, K., Nanda, V., Easwar, S., and Lim, S. K., 2005, "Wire Congestion and Thermal Aware 3D Global Placement," Proc. Asia and South Pacific Design Automation Conf.
-
(2005)
Proc. Asia and South Pacific Design Automation Conf
-
-
Balakrishnan, K.1
Nanda, V.2
Easwar, S.3
Lim, S.K.4
-
83
-
-
17644418462
-
Thermal-Aware IP Virtualization and Placement for Networks-on-Chip Architecture
-
Hung, W., Addo-Quaye, C., Theocharides, T., Xie, Y., Vijakrishnan, N., and Irwin, M. J., 2004, "Thermal-Aware IP Virtualization and Placement for Networks-on-Chip Architecture," Proc. IEEE Int. Conf. Computer Design: VLSI in Computers and Processors
-
(2004)
Proc. IEEE Int. Conf. Computer Design: VLSI in Computers and Processors
-
-
Hung, W.1
Addo-Quaye, C.2
Theocharides, T.3
Xie, Y.4
Vijakrishnan, N.5
Irwin, M.J.6
-
84
-
-
27444438269
-
A Case for Thermal-Aware Floorplanning at the Microarchitectural Level
-
Sankaranarayanan, K., Velusamy, S., Stan, M. R., and Skadron, K., 2005, "A Case for Thermal-Aware Floorplanning at the Microarchitectural Level," The Journal of Instruction-Level Parallelism, 8, pp. 1-16.
-
(2005)
The Journal of Instruction-Level Parallelism
, vol.8
, pp. 1-16
-
-
Sankaranarayanan, K.1
Velusamy, S.2
Stan, M.R.3
Skadron, K.4
-
85
-
-
84886688297
-
Thermal-Aware Floorplanning Using Genetic Algorithms
-
Hung, W.-L., Xie, Y., Vijaykrishnan, N., Addo-Quaye, C., Theocharides, T., and Irwin, M. J., 2005, "Thermal-Aware Floorplanning Using Genetic Algorithms," Proc. Int. Symp. Quality of Electronic Design
-
(2005)
Proc. Int. Symp. Quality of Electronic Design
-
-
Hung, W.-L.1
Xie, Y.2
Vijaykrishnan, N.3
Addo-Quaye, C.4
Theocharides, T.5
Irwin, M.J.6
-
86
-
-
29144494605
-
On-Chip Thermal Gradient Analysis and Temperature Flattening for SoC Design
-
Sato, T., Ichimiya, J., Ono, N., Hachiya, K., and Hashimoto, M., 2005, "On-Chip Thermal Gradient Analysis and Temperature Flattening for SoC Design," IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences, E88-A(12), pp. 3382-3388.
-
(2005)
IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences
, vol.E88-A
, Issue.12
, pp. 3382-3388
-
-
Sato, T.1
Ichimiya, J.2
Ono, N.3
Hachiya, K.4
Hashimoto, M.5
-
87
-
-
16244385917
-
A Thermal-Driven Floorplanning Algorithm for 3D ICs
-
Santa Clara, CA
-
Cong, J., Wei, J., and Zhang, Y., 2004, "A Thermal-Driven Floorplanning Algorithm for 3D ICs," Proc. IEEE/ACM Int. Conf. Computer Aided Design, Santa Clara, CA.
-
(2004)
Proc. IEEE/ACM Int. Conf. Computer Aided Design
-
-
Cong, J.1
Wei, J.2
Zhang, Y.3
-
88
-
-
84861422150
-
Thermal-Driven Multilevel Routing for 3-D ICs
-
Shanghai, China
-
Cong, J., and Zhang, Y., 2005, "Thermal-Driven Multilevel Routing for 3-D ICs," Proc. Asia South Pacific Design Automation Conf., Shanghai, China.
-
(2005)
Proc. Asia South Pacific Design Automation Conf
-
-
Cong, J.1
Zhang, Y.2
-
89
-
-
33645668035
-
Placement of Thermal Vias in 3-D ICs Using Various Thermal Objectives
-
Goplen, B., and Sapatnekar, S. S., 2006, "Placement of Thermal Vias in 3-D ICs Using Various Thermal Objectives," IEEE Trans. Computer-Aided Design, 25(4), pp. 692-709.
-
(2006)
IEEE Trans. Computer-Aided Design
, vol.25
, Issue.4
, pp. 692-709
-
-
Goplen, B.1
Sapatnekar, S.S.2
-
90
-
-
0029473781
-
Thermal Placement for High-Performance Multichip Modules
-
Austin, TX
-
Chao, K. Y., and Wong, D. F., 1995, "Thermal Placement for High-Performance Multichip Modules," Proc. IEEE Int. Conf. Computer Design, Austin, TX.
-
(1995)
Proc. IEEE Int. Conf. Computer Design
-
-
Chao, K.Y.1
Wong, D.F.2
-
91
-
-
0030787692
-
Thermally Constrained Placement of Smart-Power IC's and Multi-Chip Modules
-
Austin, TX
-
Lampaert, K., Gielen, G., and Sansen, W., 1997, "Thermally Constrained Placement of Smart-Power IC's and Multi-Chip Modules," Proc. IEEE SEMI-THERM XIII, Austin, TX.
-
(1997)
Proc. IEEE SEMI-THERM
, vol.13
-
-
Lampaert, K.1
Gielen, G.2
Sansen, W.3
-
92
-
-
0032757281
-
Object-Oriented Thermal Placement Using an Accurate Heat Model
-
Maui, HI
-
Beebe, C., Carothers, J. D., and Ortega, A., 1999, "Object-Oriented Thermal Placement Using an Accurate Heat Model," Proc. HICSS-32, Maui, HI.
-
(1999)
Proc. HICSS-32
-
-
Beebe, C.1
Carothers, J.D.2
Ortega, A.3
-
93
-
-
0033685921
-
MCM Placement Using a Realistic Thermal Model
-
Chicago, IL
-
Beebe, C., Carothers, J. D., and Ortega, A., 2000, "MCM Placement Using a Realistic Thermal Model," Proc. Great Lakes Symp. on VLSI, Chicago, IL.
-
(2000)
Proc. Great Lakes Symp. on VLSI
-
-
Beebe, C.1
Carothers, J.D.2
Ortega, A.3
-
94
-
-
0029316393
-
Reliability and Wirability Optimizations for Module Placement on a Convectively Cooled Printed Wiring Board
-
Lee, J., Chou, J.-H., and Fu, S.-L., 1995, "Reliability and Wirability Optimizations for Module Placement on a Convectively Cooled Printed Wiring Board," Integration, the VLSI Journal, 18(2-3), pp. 173-186.
-
(1995)
Integration, the VLSI Journal
, vol.18
, Issue.2-3
, pp. 173-186
-
-
Lee, J.1
Chou, J.-H.2
Fu, S.-L.3
-
95
-
-
0029509310
-
Interdisciplinary Design Optimization for High-Speed Packages and Interconnects
-
Montreal, Canada
-
Mihan, K. K., Stacey, B. J., and Montor, T., 1995, " Interdisciplinary Design Optimization for High-Speed Packages and Interconnects," Proc. IEEE Canadian Conf. on Electrical and Computer Engineering, Montreal, Canada.
-
(1995)
Proc. IEEE Canadian Conf. on Electrical and Computer Engineering
-
-
Mihan, K.K.1
Stacey, B.J.2
Montor, T.3
-
96
-
-
85196545547
-
-
Queipo, N. V., and Gil, G. F., 2000, Multiobjective Optimal Placement of Convectively and Conductively Cooled Electronic Components on Printed Wiring Boards, ASME J. Electro. Packag., 122(2), pp. 152-159.
-
Queipo, N. V., and Gil, G. F., 2000, "Multiobjective Optimal Placement of Convectively and Conductively Cooled Electronic Components on Printed Wiring Boards," ASME J. Electro. Packag., 122(2), pp. 152-159.
-
-
-
-
97
-
-
0032022845
-
Multiobjective Optimal Placement of Convectively Cooled Electronic Components on Printed Wiring Boards
-
Queipo, N. V., Humphrey, J. A. C., and Ortega, A., 1998, "Multiobjective Optimal Placement of Convectively Cooled Electronic Components on Printed Wiring Boards," IEEE Trans. Comp. Packag. Technol. A, 21(1), pp. 142-153.
-
(1998)
IEEE Trans. Comp. Packag. Technol. A
, vol.21
, Issue.1
, pp. 142-153
-
-
Queipo, N.V.1
Humphrey, J.A.C.2
Ortega, A.3
-
98
-
-
0030826019
-
Multiobjective Optimization of Component Placement on Planar Printed Wiring Boards
-
Austin, TX
-
Queipo, N. V., and Gil, G. F., 1997, "Multiobjective Optimization of Component Placement on Planar Printed Wiring Boards," Proc. IEEE SEMI-THERM XIII, Austin, TX.
-
(1997)
Proc. IEEE SEMI-THERM
, vol.13
-
-
Queipo, N.V.1
Gil, G.F.2
-
99
-
-
85196559970
-
Multiobjective Optimization of Component Placement on Printed Wiring Boards
-
Orlando, FL
-
Queipo, N. V., Humphrey, J. A. C., and Ortega, A., 1996, "Multiobjective Optimization of Component Placement on Printed Wiring Boards," Proc. IEEE I-THERM V, Orlando, FL.
-
(1996)
Proc. IEEE I-THERM
, vol.5
-
-
Queipo, N.V.1
Humphrey, J.A.C.2
Ortega, A.3
-
100
-
-
85196483762
-
-
Scholand, A. J., Fulton, R. E., and Bras, B., 1999, Investigation of PWB Layout by Genetic Algorithms to Maximize Fatigue Life, ASME J. Electro. Packag., 121(1), pp. 31-36.
-
Scholand, A. J., Fulton, R. E., and Bras, B., 1999, "Investigation of PWB Layout by Genetic Algorithms to Maximize Fatigue Life," ASME J. Electro. Packag., 121(1), pp. 31-36.
-
-
-
-
101
-
-
32844471106
-
Circuit-Thermal Collaboration Design Method for Outline Design Stage of Mobile Terminal
-
San Francisco, CA
-
Iwata, Y., Hayashi, S., Satoh, R., and Fujmoto, K., 2005, "Circuit-Thermal Collaboration Design Method for Outline Design Stage of Mobile Terminal," Proc. ASME InterPACK, San Francisco, CA.
-
(2005)
Proc. ASME InterPACK
-
-
Iwata, Y.1
Hayashi, S.2
Satoh, R.3
Fujmoto, K.4
-
102
-
-
4444258455
-
Multiobjective Placement of Electronic Components Using Evolutionary Algorithms
-
Deb, K., Jain, P., Gupta, N. K., and Maji, H. K., 2004, "Multiobjective Placement of Electronic Components Using Evolutionary Algorithms," IEEE Trans. Comp. Packag. Technol., 27(3), pp. 480-492.
-
(2004)
IEEE Trans. Comp. Packag. Technol
, vol.27
, Issue.3
, pp. 480-492
-
-
Deb, K.1
Jain, P.2
Gupta, N.K.3
Maji, H.K.4
-
104
-
-
85196529245
-
-
Suwa, T., and Hadim, H., 2007, Multidisciplinary Placement Optimization of Heat Generating Electronic Components on a Printed Circuit Board in an Enclosure, IEEE Transactions on Component and Packaging Technology(to be published).
-
Suwa, T., and Hadim, H., 2007, "Multidisciplinary Placement Optimization of Heat Generating Electronic Components on a Printed Circuit Board in an Enclosure," IEEE Transactions on Component and Packaging Technology(to be published).
-
-
-
-
105
-
-
0035019290
-
Multi-Objective Placement Optimization of Power Electronic Devices on Liquid Cooled Heat Sinks
-
San Jose, CA
-
Gopinath, D., Joshi, Y. K., and Azarm, S., 2001, "Multi-Objective Placement Optimization of Power Electronic Devices on Liquid Cooled Heat Sinks," Proc. Annual IEEE Symp., San Jose, CA.
-
(2001)
Proc. Annual IEEE Symp
-
-
Gopinath, D.1
Joshi, Y.K.2
Azarm, S.3
-
106
-
-
29244464349
-
An Integrated Methodology for Multiobjective Optimal Component Placement and Heat Sink Sizing
-
Gopinath, D., Joshi, Y., and Azarm, S., 2005, "An Integrated Methodology for Multiobjective Optimal Component Placement and Heat Sink Sizing," IEEE Trans. Comp. Packag. Technol., 28(4), pp. 869-876.
-
(2005)
IEEE Trans. Comp. Packag. Technol
, vol.28
, Issue.4
, pp. 869-876
-
-
Gopinath, D.1
Joshi, Y.2
Azarm, S.3
-
107
-
-
85196535031
-
-
Campbell, I. M., Amon, H. C., and Cagan, J., 1997, Optimal Three-Dimensional Placement of Heat Generating Electronic Components, ASME J. Electro. Packag., 119(2), pp. 106-113.
-
Campbell, I. M., Amon, H. C., and Cagan, J., 1997, "Optimal Three-Dimensional Placement of Heat Generating Electronic Components," ASME J. Electro. Packag., 119(2), pp. 106-113.
-
-
-
-
108
-
-
34249807672
-
Electronic Component Placement Using Simulated Annealing under Thermal Constraints
-
San Francisco, CA
-
Campbell, I. M., Cagan, J., Amon, H. C., and Szykman, S., 1995, "Electronic Component Placement Using Simulated Annealing under Thermal Constraints," Proc. ASME Int. Mec. Eng. Congress and Exposition, San Francisco, CA.
-
(1995)
Proc. ASME Int. Mec. Eng. Congress and Exposition
-
-
Campbell, I.M.1
Cagan, J.2
Amon, H.C.3
Szykman, S.4
-
109
-
-
79961055880
-
A Stochastic Optimization Tool for Determining Spacecraft Avionics Box Placement
-
Big Sky, MT
-
Jackson, B., and Norgard, J., 2002, "A Stochastic Optimization Tool for Determining Spacecraft Avionics Box Placement," Proc. IEEE Aerospace Conference, Big Sky, MT.
-
(2002)
Proc. IEEE Aerospace Conference
-
-
Jackson, B.1
Norgard, J.2
-
110
-
-
0037272216
-
Multi-Objective Design of Liquid Cooled Power Electronic Modules for Transient Operation
-
San Jose, CA
-
Kaczorowski, P. R., Joshi, Y., and Azarm, S., 2003, "Multi-Objective Design of Liquid Cooled Power Electronic Modules for Transient Operation," Proc. IEEE SEMI-THERM, San Jose, CA.
-
(2003)
Proc. IEEE SEMI-THERM
-
-
Kaczorowski, P.R.1
Joshi, Y.2
Azarm, S.3
-
111
-
-
32844474812
-
Thermal Based Optimization of Functional Block Distributions in a Non-Uniformly Powered Die
-
San Francisco, CA
-
Kaisare, A., Agonafer, D., Haji-Shiekh, A., Chriysler, G., and Mahajan, R., 2005, "Thermal Based Optimization of Functional Block Distributions in a Non-Uniformly Powered Die," Proc. ASME InterPack, San Francisco, CA.
-
(2005)
Proc. ASME InterPack
-
-
Kaisare, A.1
Agonafer, D.2
Haji-Shiekh, A.3
Chriysler, G.4
Mahajan, R.5
-
112
-
-
0030168095
-
Hierarchical Placement for Power Hybrid Circuits under Reliability and Wireability Constraints
-
Lee, J., and Chou, J.-H., 1996, "Hierarchical Placement for Power Hybrid Circuits under Reliability and Wireability Constraints," IEEE Trans. Rel., 45, pp. 200-207.
-
(1996)
IEEE Trans. Rel
, vol.45
, pp. 200-207
-
-
Lee, J.1
Chou, J.-H.2
-
113
-
-
85196480009
-
-
Huang, Y., and Fu, S., 2000, Thermal Placement Design for MCM Applications, ASME J. Electro. Packag., 122(2), pp. 115-120.
-
Huang, Y., and Fu, S., 2000, "Thermal Placement Design for MCM Applications," ASME J. Electro. Packag., 122(2), pp. 115-120.
-
-
-
-
114
-
-
0035480142
-
Fuzzy Thermal Modeling for MCM Placement
-
Huang, Y.-J., Fu, S.-L., Jen, S.-L., and Guo, M.-h., 2001, "Fuzzy Thermal Modeling for MCM Placement," Microelectronics Journal, 32(10-11), pp. 863-868.
-
(2001)
Microelectronics Journal
, vol.32
, Issue.10-11
, pp. 863-868
-
-
Huang, Y.-J.1
Fu, S.-L.2
Jen, S.-L.3
Guo, M.-H.4
-
115
-
-
0035885537
-
Fuzzy Thermal Placement for Multichip Module Applications
-
Huang, Y.-J., and Guo, M.-h., 2001, "Fuzzy Thermal Placement for Multichip Module Applications," Fuzzy Sets and Systems, 122(2), pp. 185-194.
-
(2001)
Fuzzy Sets and Systems
, vol.122
, Issue.2
, pp. 185-194
-
-
Huang, Y.-J.1
Guo, M.-H.2
-
116
-
-
0041384477
-
Thermal Placement Algorithm Based on Heat Conduction Analogy
-
Lee, J., 2003, "Thermal Placement Algorithm Based on Heat Conduction Analogy," IEEE Trans. Comp. Packag. Technol., 26(2), pp. 473-482.
-
(2003)
IEEE Trans. Comp. Packag. Technol
, vol.26
, Issue.2
, pp. 473-482
-
-
Lee, J.1
-
117
-
-
21244445907
-
Reliability and Wireability Optimizations for Chip Placement on Multichip Modules
-
Lee, J., 2005, "Reliability and Wireability Optimizations for Chip Placement on Multichip Modules," IEEE Trans. Electron. Packag. Manufact., 28(2), pp. 133-141.
-
(2005)
IEEE Trans. Electron. Packag. Manufact
, vol.28
, Issue.2
, pp. 133-141
-
-
Lee, J.1
-
118
-
-
0032204632
-
A Matrix Synthesis Approach to Thermal Placement
-
Chu, C. C. N., and Wong, D. F., 1998, "A Matrix Synthesis Approach to Thermal Placement," IEEE Trans. Computer-Aided Design, 17(11), pp. 1166-1174.
-
(1998)
IEEE Trans. Computer-Aided Design
, vol.17
, Issue.11
, pp. 1166-1174
-
-
Chu, C.C.N.1
Wong, D.F.2
-
119
-
-
84942531856
-
Cluster Growth Revisited: Fast, Mixed-Signal Placement of Blocks and Gates
-
Las Vegas, NV
-
Newbould, R. D., and Carothers, J. D., 2003, "Cluster Growth Revisited: Fast, Mixed-Signal Placement of Blocks and Gates," Proc. Southwest Symp. Mixed-Signal Design, Las Vegas, NV.
-
(2003)
Proc. Southwest Symp. Mixed-Signal Design
-
-
Newbould, R.D.1
Carothers, J.D.2
-
120
-
-
0036530772
-
A Fast and Elitist Multiobjective Genetic Algorithm: NSGA-II
-
Deb, K., Pratap, A., Agarwal, S., and Meyarivan, T., 2002, "A Fast and Elitist Multiobjective Genetic Algorithm: NSGA-II," IEEE Trans. Evol. Comput., 6(2), pp. 182-197.
-
(2002)
IEEE Trans. Evol. Comput
, vol.6
, Issue.2
, pp. 182-197
-
-
Deb, K.1
Pratap, A.2
Agarwal, S.3
Meyarivan, T.4
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