A Charge-Based CMOS Parallel Analog Vector Quantizer

NIPS 1994: Proceedings of the 7th International Conference on Neural Information Processing Systems

Volumn , Issue , 1994, Pages 779-786

  Cauwenberghs, Gert ^a   Pedroni, Volnei ^b  

^a JOHNS HOPKINS UNIVERSITY   (United States)

^b CALIFORNIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; VECTOR QUANTIZATION; VECTORS;

ANALOG VECTOR QUANTIZATION; ANALOG VLSI; DISTANCE ESTIMATION; DYNAMIC TEMPLATES; MEAN ABSOLUTE DIFFERENCES; TEMPLATE VECTORS; VECTOR FIELDS; VECTOR QUANTIZERS; VLSI CHIP; WINNER-TAKE-ALL;

FEEDBACK;

EID: 85153935542     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (9)

1. A. Gersho and R. M. Gray, Vector Quantization and Signal Compression, Norwell, MA: Kluwer, 1992.
2. T. Kohonen, Self-Organisation and Associative Memory, Berlin: Springer-Verlag, 1984.
3. Y. He and U. Cilingiroglu, "A Charge-Based On-Chip Adaptation Kohonen Neural Network, " IEEE Transactions on Neural Networks, vol. 4(3), pp 462-469, 1993.
4. J. C. Lee, B. J. Sheu, and W. C. Fang, "VLSI Neuroprocessors for Video Motion Detection, " IEEE Transactions on Neural Networks, vol. 4(2), pp 78-191, 1993.
5. R. Tawel, "Real-Time Focal-Plane Image Compression, " in Proceedings Data Compression Conference, , Snowbird, Utah, IEEE Computer Society Press, pp 401-409, 1993.
6. G. T. Tuttle, S. Fallahi, and A. A. Abidi, "An 8b CMOS Vector A/D Converter, " in ISSCC Technical Digest, IEEE Press, vol. 36, pp 38-39, 1993.
7. C. A. Mead, Analog VLSI and Neural Systems, Reading, MA: Addison-Wesley, 1989.
8. J. Lazzaro, S. Ryckebusch, M. A. Mahowald, and C. A. Mead, "Winner-Take-All Networks of O (n) Complexity, " in Advances in Neural Information Processing Systems, San Mateo, CA: Morgan Kaufman, vol. 1, pp 703-711, 1989.
9. A. G. Andreou, K. A. Boahen, P. O. Pouliquen, A. Pavasovic, R. E. Jenkins, and K. Strohbehn, "Current-Mode Subthreshold MOS Circuits for Analog VLSI Neural Systems, " IEEE Transactions on Neural Networks, vol. 2(2), pp 205-213, 1991.