VLSI Test Principles and Architectures: Design for Testability

VLSI Test Principles and Architectures: Design for Testability

Volumn , Issue , 2006, Pages 1-777

  Wang, Laung Terng ^a   Wu, Cheng Wen ^b   Wen, Xiaoqing ^c  

^a SYNTEST TECHNOLOGIES INC   (United States)

^b NATIONAL TSING HUA UNIVERSITY   (Taiwan)

^c KYUSHU INSTITUTE OF TECHNOLOGY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 85145154152     PISSN: None     EISSN: None     Source Type: Book    
DOI: 10.1016/B978-012370597-6/50000-7     Document Type: Book

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