Memory performance at reduced CPU clock speeds: An analysis of current x86_64 processors

2012 Workshop on Power-Aware Computing Systems, HotPower 2012

Volumn , Issue , 2012, Pages

  Schöne, Robert ^a   Hackenberg, Daniel ^a   Molka, Daniel ^a  

^a DRESDEN UNIVERSITY OF TECHNOLOGY   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; CLOCKS; COMPUTER ARCHITECTURE; ENERGY UTILIZATION; POWER MANAGEMENT;

APPLICATION DEVELOPERS; LAST-LEVEL CACHES; MEMORY BANDWIDTHS; MEMORY PERFORMANCE; MEMORY-BOUND APPLICATIONS; MICRO ARCHITECTURES; POWER ANALYSIS; PROCESSOR CLOCK SPEED;

CACHE MEMORY;

EID: 85086888962     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)

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