Lifetime improvement of NAND flash-based storage systems using dynamic program and erase scaling

Proceedings of the 12th USENIX Conference on File and Storage Technologies, FAST 2014

Volumn , Issue , 2014, Pages 61-74

  Jeong, Jaeyong ^a   Hahn, Sangwook Shane ^a   Lee, Sungjin ^b   Kim, Jihong ^a  

^a Seoul National University   (South Korea)

^b MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

FLASH MEMORY; MEMORY ARCHITECTURE;

ADVANCED TECHNOLOGY; LIFETIME IMPROVEMENT; NAND FLASH MEMORY; OPERATION VOLTAGE; SEMICONDUCTOR PROCESS; SYSTEM-LEVEL APPROACH; TRADE-OFF RELATIONSHIP; WRITE THROUGHPUTS;

NAND CIRCUITS;

EID: 85077061333     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (25)

1. S.-H. Shin et al., “A New 3-bit Programming Algorithm Using SLC-to-TLC Migration for 8 MB/s High Performance TLC NAND Flash Memory,” in Proc. IEEE Symp. VLSI Circuits, 2012.
2. J. Choi et al., “3D Approaches for Non-volatile Memory,” in Proc. IEEE Symp. VLSI Technology, 2011.
3. A. A. Chien et al., “Moore’s Law: The First Ending and A New Beginning,” Tech. Report, Dept. of Computer Science, the Univ. of Chicago, TR-2012-06.
4. J.-W. Hsieh et al., “Efficient Identification of Hot Data for Flash Memory Storage Systems,” ACM Trans. Storage, vol. 2, no. 1, pp. 22-40, 2006.
5. F. Chen et al., “CAFTL: A Content-Aware Flash Translation Layer Enhancing the Lifespan of Flash Memory Based Solid State Drives,” in Proc. USENIX Conf. File and Storage Tech., 2011.
6. S. Lee et al., “Improving Performance and Lifetime of Solid-State Drives Using Hardware-Accelerated Compression,” IEEE Trans. Consum. Electron., vol. 57, no. 4, pp. 1732-1739, 2011.
7. S. Lee et al., “Lifetime Management of Flash-Based SSDs Using Recovery-Aware Dynamic Throttling,” in Proc. USENIX Conf. File and Storage Tech., 2012.
8. V. Mohan et al., “How I Learned to Stop Worrying and Love Flash Endurance,” in Proc. USENIX Workshop Hot Topics in Storage and File Systems, 2010.
9. N. Mielke et al., “Bit Error Rate in NAND Flash Memories,” in Proc. IEEE Int. Reliability Physics Symp., 2008.
10. 2 at Very Low Voltages,” IEEE Trans. Electron Devices, vol. 41, no. 7, pp. 1227-1232, 1994.
11. S. Cho, “Improving NAND Flash Memory Reliability with SSD Controllers,” in Proc. Flash Memory Summit, 2013.
12. S. Lee et al., “FlashBench: A Workbench for a Rapid Development of Flash-Based Storage Devices,” in Proc. IEEE Int. Symp. Rapid System Prototyping, 2012.
13. R.-S. Liu et al., “Optimizing NAND Flash-Based SSDs via Retention Relaxation,” in Proc. USENIX Conf. File and Storage Tech., 2012.
14. K.-D. Suh et al., “A 3.3 V 32 Mb NAND Flash Memory with Incremental Step Pulse Programming Scheme,” IEEE J. Solid-State Circuits, vol. 30, no. 11, pp. 1149-1156, 1995.
15. JEDEC Standard,”Stress-Test-Driven Qualification of Integrated Circuits,” JESD47H.01, 2011.
16. J. Jeong and J. Kim, “Dynamic Program and Erase Scaling in NAND Flash-based Storage Systems,” Tech. Report, Seoul National Univ., http://cares.snu.ac.kr/download/TR-CARES-01-14, 2014.
17. D.-W. Lee et al., “The Operation Algorithm for Improving the Reliability of TLC (Triple Level Cell) NAND Flash Characteristics,” in Proc. IEEE Int. Memory Workshop, 2011.
18. J. Yang, “High-Efficiency SSD for Reliable Data Storage Systems,” in Proc. Flash Memory Summit, 2011.
19. R. Frickey, “Data Integrity on 20 nm NAND SSDs,” in Proc. Flash Memory Summit, 2012.
20. L.-P. Chang, “On Efficient Wear Leveling for Large-Scale Flash-Memory Storage Systems,” in Proc. ACM Symp. Applied Computing, 2007.
21. IBM “Kernel APIs, Part 3: Timers and Lists in the 2.6 Kernel,” http://www.ibm.com/developerworks/library/l-timers-list/.
22. D. Narayanan et al., “Write Off-Loading: Practical Power Management for Enterprise Storage,” in Proc. USENIX Conf. File and Storage Tech., 2008.
23. http://www.ubuntu.com/download
24. Q. Wu et al., “Exploiting Heat-Accelerated Flash Memory Wear-Out Recovery to Enable Self-Healing SSDs,” in Proc. USENIX Workshop Hot Topics in Storage and File Systems, 2011.
25. J. Jeong et al., “Improving NAND Endurance by Dynamic Program and Erase scaling,” in Proc. USENIX Workshop Hot Topics in Storage and File Systems, 2013.