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Volumn , Issue , 1990, Pages 212-216

Technology mapping using Boolean matching and don't care sets

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED DESIGN; SOFTWARE TESTING;

EID: 85061355883     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EDAC.1990.136647     Document Type: Conference Paper
Times cited : (49)

References (19)
  • 2
    • 0024176067 scopus 로고
    • Technology mapping far standard-cell generators
    • November
    • M.R.C.M. Berkelaar and J. A.G. Jess, Technology Mapping far Standard-Cell Generators, Proceedings of the 1CCAD, pp. 470-473, November 1988.
    • (1988) Proceedings of the 1CCAD , pp. 470-473
    • Berkelaar, M.R.C.M.1    Jess, J.A.G.2
  • 13
    • 0024142721 scopus 로고
    • Mapping properties of multi-level logic synthesis operations
    • October
    • M. C. Lega, Mapping Properties of Multi-Level Logic Synthesis Operations, Proceedings of the ICCD, pp.257-261, October 1988.
    • (1988) Proceedings of the ICCD , pp. 257-261
    • Lega, M.C.1
  • 14
    • 0024136038 scopus 로고
    • Mcmap: A fast technology mapping procedure for multi-level logic synthesis
    • October
    • R. Lisanke, F. Brglez, G. Kedem, McMAP: A Fast Technology Mapping Procedure for Multi-Level Logic Synthesis, Proceedings of the ICCD, pp. 252-256, October 1988.
    • (1988) Proceedings of the ICCD , pp. 252-256
    • Lisanke, R.1    Brglez, F.2    Kedem, G.3
  • 15
    • 84926299170 scopus 로고
    • Detection of group invariance or total symmetry of a boolean function
    • November
    • E. J. McCluskey, Detection of Group Invariance or Total Symmetry of a Boolean Function, Bell Syst. tech. J., V.35, pp. 1445-1453, November 1956.
    • (1956) Bell Syst. Tech. J , vol.35 , pp. 1445-1453
    • McCluskey, E.J.1
  • 19
    • 0003623384 scopus 로고
    • PhD. Dissertation, U.C. Berkeley, Memorandum UCB/ERL M89/49, 26 April
    • R. Rudell, Logic Synthesis far VLSI Design, PhD. Dissertation, U.C. Berkeley, Memorandum UCB/ERL M89/49, 26 April 1989, 223 p.
    • (1989) Logic Synthesis Far VLSI Design , pp. 223
    • Rudell, R.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.