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Technical Digest - International Electron Devices Meeting, IEDM

Volumn 1992-December, Issue , 1992, Pages 353-356

SOI technology for high-temperature applications

(5) Francis, P a Terao, A a Gentinne, B a Flandre, D a Colinge, J P a

a UNIVERSITÉ CATHOLIQUE DE LOUVAIN (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

HIGH TEMPERATURE APPLICATIONS; LEAKAGE CURRENTS; MOS DEVICES; MOSFET DEVICES; OPERATIONAL AMPLIFIERS; SILICON ON INSULATOR TECHNOLOGY; THRESHOLD VOLTAGE;

DIGITAL APPLICATIONS; FREQUENCY DIVIDERS; HIGH TEMPERATURE PERFORMANCE; ORDERS OF MAGNITUDE; OUTPUT CONDUCTANCE; PERFORMANCE DEGRADATION; SILICON-ON-INSULATOR MOSFETS; THRESHOLD VOLTAGE VARIATION;

HIGH FREQUENCY AMPLIFIERS;

EID: 85051932796 PISSN: 01631918 EISSN: None Source Type: Conference Proceeding
DOI: 10.1109/IEDM.1992.307590 Document Type: Conference Paper

Times cited : (48)

References (7)

1
- 0003783816
- Kluwer Academic Publishers
- I. P. Colinge, Silicon-On-Insulator Technology: Materials to VLSI, Kluwer Academic Publishers, 1991.
- (1991) Silicon-On-Insulator Technology: Materials to VLSI
- Colinge, I.P.¹

2
- 0025575976
- Silicon-on-insulator gate-all-around device
- J. P. Colinge, M. H. Gao, A. Romano, H. Maes and C. Claeys, "Silicon-on-insulator gate-all-around device", IEDM Technical Digest, 1990, p. 595
- (1990) IEDM Technical Digest , pp. 595
- Colinge, J.P.¹ Gao, M.H.² Romano, A.³ Maes, H.⁴ Claeys, C.⁵

3
- 0026908041
- Extended theoretical analysis of the steady-state linear behaviour of accumulation-mode, long-channel p-MOSFETs on SOI substrates
- D. Flandre and A. Terao, "Extended theoretical analysis of the steady-state linear behaviour of accumulation-mode, long-channel p-MOSFETs on SOI substrates", Solid-State Electronics, vol. 35, 1992, p. 1085
- (1992) Solid-State Electronics , vol.35 , pp. 1085
- Flandre, D.¹ Terao, A.²

4
- 0025475660
- Temperature dependence of threshold voltage in thin-film SOI MOSFETs
- G. Groeseneken, J. P. Colinge, H. E. Maes, J. C. Alderman, and S. Holt, "Temperature dependence of threshold voltage in thin-film SOI MOSFETs", IEEE Electron Dev. Letters, vol. 11, 1990, p. 329
- (1990) IEEE Electron Dev. Letters , vol.11 , pp. 329
- Groeseneken, G.¹ Colinge, J.P.² Maes, H.E.³ Alderman, J.C.⁴ Holt, S.⁵

5
- 0002295464
- Design techniques for high-speed low-power and high-temperature digital CMOS circuits on SOI
- D. Flandre, C. Jacquemin, and J.-P. Colinge, "Design techniques for high-speed low-power and high-temperature digital CMOS circuits on SOI", IEEE SOS/SOI Conf., 1992
- (1992) IEEE SOS/SOI Conf.
- Flandre, D.¹ Jacquemin, C.² Colinge, J.-P.³

6
- 33747696318
- Performances of fully-depleted SOI analog operational amplifiers
- B. Gentinne, J.-P. Colinge, and P. G. A. Jespers, "Performances of fully-depleted SOI analog operational amplifiers", IEEE SOS/SOI Conf., 1992
- (1992) IEEE SOS/SOI Conf.
- Gentinne, B.¹ Colinge, J.-P.² Jespers, P.G.A.³

7
- 0026854177
- Twin-MOSFET structure for suppression of kink and parasitic bipolar effects in SOI MOSFETs at room and liquid helium temperatures
- M. Gao, J. P. Colinge, L. Lauwers, S. Wu, and C. Claeys, 'Twin-MOSFET structure for suppression of kink and parasitic bipolar effects in SOI MOSFETs at room and liquid helium temperatures", Solid-State Electronics, vol. 35, 1992, p. 505
- (1992) Solid-State Electronics , vol.35 , pp. 505
- Gao, M.¹ Colinge, J.P.² Lauwers, L.³ Wu, S.⁴ Claeys, C.⁵

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