Pipeline architecture of specialized reconfigurable processors in FPGA structures for real-time image pre-processing

Proceedings - 24th EUROMICRO Conference, EURMIC 1998

Volumn 1, Issue , 1998, Pages 131-138

  Wiatr, K ^a  

^a AGH UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Poland)

Author keywords

FPGAs; image processors; real time systems; reconfigurable systems

Indexed keywords

ARCHITECTURE; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); IMAGE PROCESSING; INTERACTIVE COMPUTER SYSTEMS; REAL TIME SYSTEMS; RECONFIGURABLE ARCHITECTURES; RECONFIGURABLE HARDWARE; TABLE LOOKUP;

IMAGE PROCESSORS; LOGIC PROCESSOR; PIPELINE ARCHITECTURE; REAL TIME IMAGES; RECONFIGURABLE PROCESSORS; RECONFIGURABLE SYSTEMS; SCIENTIFIC RESEARCHES; SPECIALIZED HARDWARE;

PIPELINE PROCESSING SYSTEMS;

EID: 85049845130     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EURMIC.1998.711787     Document Type: Conference Paper

References (16)

1. Advanced Imaging, PTN Publishing CO, New York 1995- 1997
2. K. R. Castleman: Digital Image Processing, Prentice Hall 1996
3. S. C. Chan, H. 0. Ngai, K. L. Ho: A Programmable Image Processing System using FPGA, Proc. of the IEEE Int. Symposium on Circuits and Systems, London 1994
4. A. L. Decegama: The Technology of Parallel Processing - Parallel Processing Architectures and VLSI Hardware, Prentice Hall 1989
5. B. Jahne: Digital Im, age Processing, Springer-Verlag 1995
6. J. H. Jenkins: Designiing with FPGAs and CPLDs, Prentice Hall 1994
7. Y. Iwata, M. Kawamata, T. Higuchi: Design of fine VLSI arraay processor for real-time 2-D digital filtering, IEEE Symposium on Circuits and Systems, Chicago 1993
8. P. P. Jonker: Morphological Image Processing: Architecture and VLSI design, Kluwer Holland 1992
9. J. Kittler, M. J. B. Duff: Image Processing System Architecture, John Wiley & Sons 1985
10. B. Liebowitz, J. Carson: Multiple Processor Systems for Real Time Applications, Prentice Hall 1985
11. S. M. Trimberger: Field Programmable Gate Array Technology, Kluwer 1994
12. A. Tsutsui, T. Miyazaki, K. Yamada, N. Ohta: Special Purpose FPGA for High-speed Digital Telecomunication Systems, Proc. of the IEEE Intern. Conf. on Computer Design: VLSI in Computers & Processors, Austin - Texas 1995
13. K. Wiatr: Pipeline Multiprocessor Architecture for Fast Image Pre-Processing in Real-Time Applications, Proc. of the IASTED Int. Conference: Signal and Image Processing, Las Vegas 1995
14. K. Wiatr: A Dedicated Hardware Logic Processor for Real- Time Image Pre-Processing, Proc. of the IASTED Int. Conference: Control'97, Cancun 1997
15. K. Wiatr: Specialized Hardware Median Processor Implemented in FPGA Structure for Pipeline Architecture to Real-Time Image Pre-Processing, Proc. of the IASTED Int. Conference: Parallel and Distributed Computing and Systems, Washington 1997
16. Xilinx: The Programmable Logic Data Book, San Jose 1996