Integration aspects for damascene copper interconnect in low k dielectric

Proceedings of the IEEE 1998 International Interconnect Technology Conference, IITC 1998

Volumn 1998-June, Issue , 1998, Pages 154-156

  Blaschke, V ^a   Bersuker, G ^a   Muralidhar, R ^a   Breen, M ^a   Mikkola, B ^a   Mucha, J ^a   Fowler, B ^a   Marsden, M ^a   Wang, A ^a   Dempsey, S ^a   Schmidt, A ^a   Monnig, K ^a  

^a SEMATECH   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CHEMICAL MECHANICAL POLISHING; COPPER; DIELECTRIC MATERIALS; LOW-K DIELECTRIC;

CMP PROCESS; DAMASCENE COPPER; INTEGRATION ISSUES; LINE RESISTANCE; LINEWIDTH MEASUREMENTS; PROCESS INTEGRATION; TEST STRUCTURE;

INTEGRATED CIRCUIT INTERCONNECTS;

EID: 85049586601     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IITC.1998.704777     Document Type: Conference Paper

References (6)

1. S. Venkatesan et al, IEDM Digest, December, 1997, pp. 769-772
2. E.M. Zielinski et al, IEDM Digest, December, 1997, pp. 936-938
3. V. Blaschke, L. Witters, S.W. Hsia, D. Dornisch, K. Rafftesaeth, Ch4P-MIC Proceedings, February, 1997, pp. 219-226 .
4. D. Edelstein et al, IEDM Digest, December, 1997, pp. 773-776
5. H.A. Schafft, S. Mayo, S.N. Jones, J.S. Suehle, IEEE IRW ha1 report, 1994, pp. 12-19
6. D. Domisch, G. Eves, S. Keeler, L. Witters, V Blaschke, VMIC Proceedings, June, 1997, pp. 310-312