Reusable intellectual property cores in PC data protection ASIC design

AP-ASIC 1999 - 1st IEEE Asia Pacific Conference on ASICs

Volumn , Issue , 1999, Pages 278-281

  Kim, Doh Kyung ^a   Kwon, Ki Won ^a   Choi, Jong Chan ^a   Lee, Chul Dong ^a  

^a Korea Electronic Technology Institute (KETI)   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 85047498518     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/APASIC.1999.824083     Document Type: Conference Paper

References (4)

1. Ph. Delforge, "IP Re-use Model, IP Market and IP Corporate Database", Proc. of Intellectual Property System on Chip Conference, PP 11-16, Mar, 1998.
2. Milan Gandhi, "Measuring the Intellectual Property Advantage", Proc. of Intellectual Property System on Chip Conference, PP 41-48, Mar, 1998.
3. http://www. pcisig. com
4. Randall Bolster, Product Marketing Engineer, "Reusable Intellectual Property Cores in Ethernet ASIC Desings", Proc. of Intellectual Property System on Chip Conference, PP 121-129, Mar, 1999.