Compiler techniques to extract parallelism within a nested loop

Proceedings - International Computer Software and Applications Conference

Volumn , Issue , 1991, Pages 24-29

  Wang, Chien Min ^a   Wang, Sheng De ^a  

^a NATIONAL TAIWAN UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION PROGRAMS; LINEARIZATION; PROGRAM COMPILERS;

COMPILER TECHNIQUES; ITERATION SPACES; NESTED LOOPS; OPTIMAL LINEARIZATION;

ITERATIVE METHODS;

EID: 85040660134     PISSN: 07303157     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CMPSAC.1991.170147     Document Type: Conference Paper

References (6)

1. J. R. Allen, and K. Kennedy, "Automatic loop interchange", ACM SIGPLAN Notices, vol. 19, no. 6, pp. 233-246, June 1984.
2. M. Burke, and R. Cytron, "Interprocedural Dependence Analysis and Parallelization", ACM SIGPLAN Notices, vol. 21, no. 7, pp. 162-175, July 1986.
3. E. Horowitz, and S. Sahni, Fundamentals of Computer Algorithms, Computer Science Press, Inc., 1978.
4. D. J. Kuck, R. H. Kuhn, B. Leasure, and M. Wolfe, "The structure of an advanced vectorizer for pipelined processors", in Proc. Fourth Int. Comput. Software Applications Conf, pp. 709-715, Oct. 1980.
5. D. A. Padua, D. J. Kuck, and D. H. Lawrie, "High-speed multiprocessors and compilation techniques", IEEE Trans. Comput., vol. C-29, pp. 763-776, Sep. 1980.
6. C. D. Polychronopoulos, "Compiler Optimizations for Enhancing Parallelism and Their Impact on Architecture Design", IEEE Trans. Comput., vol. C-37, no. 8, pp. 991-1004, Aug. 1988.