Architectural tradeoffs in field-programmable-device-based computing systems

IEEE Symposium on FPGAs for Custom Computing Machines, Proceedings

Volumn , Issue , 1993, Pages 152-161

  Chan, P K ^a   Schlag, M D F ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMMERCE; COMPUTATION THEORY; COMPUTER CIRCUITS; INTEGRATED CIRCUIT DESIGN; LOGIC GATES; RECONFIGURABLE ARCHITECTURES;

ARCHITECTURAL TRADEOFFS; COMPUTING SYSTEM; FIELD PROGRAMMABLES; FPGA-BASED COMPUTING; PROGRAMMABLE INTERCONNECTS; PROGRAMMABLE LOGIC; REARRANGEABILITY; RECONFIGURABLE COMPUTING;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 85040348842     PISSN: 10823409     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPGA.1993.279468     Document Type: Conference Paper

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