An effective method to estimate defect limited yield impact on memory devices

10th Annual IEEE/SEMI Advanced Semiconductor Manufacturing Conference and Workshop, ASMC 1999

Volumn , Issue , 1999, Pages 87-91

  Ott, R ^a   Ollendorf, H ^a   Lammering, H ^a   Hladschik, T ^a   Haensch, W ^a  

^a White Oak Semicond   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

MANUFACTURE; SEMICONDUCTOR DEVICE MANUFACTURE; SILICON WAFERS;

DEFECT-LIMITED YIELDS; INSPECTION TOOLS; MONITOR SYSTEM; SAMPLE RATE; VOLUME DATA; WAFER PROCESSING; WAFER TEST; YIELD LOSS;

DEFECTS;

EID: 85040347997     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASMC.1999.798188     Document Type: Conference Paper

References (6)

1. M. McIntyre, "Determining yield loss using in-line defect inspection results", in Proc. KLA Yield Management Seminar, I994
2. R. K. Nurani, R. Akella, A. J Strojwas, R. Wallace, M. McIntyre, J Shields, and I. Emanmi, "Development of an optical sampling strategy for wafer inspection", in Proc. Int. Symp Semiconductor Manufacturing (ISSM'94)
3. F. Bergeret, "Analysis and Metrology-Y ield Management", MICRO Magazine (March '99), pp. 59
4. F. Lee, S . Smith, "Yield Analysis and Data Management using Yield Manager", Proc IEEEISEMI (ASMC'98)
5. J. Vollrath, "Efficient Bit Fail Map Compression Strategy", in press
6. J. Baliga, "The Top Fab of 1999", Semiconductor International (May'99)