Development of An Optimal Sampling Strategy for Wafer Inspection

IEEE International Symposium on Semiconductor Manufacturing Conference Proceedings

Volumn , Issue , 1994, Pages 143-146

  Nurani, R K ^a   Akella, R ^b   Strojwas, A J ^a   Wallace, R ^c   McIntyre, M G ^d   Shields, J ^d   Emami, I ^d  

^a CARNEGIE MELLON UNIVERSITY   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

^c KLA TENCOR CORPORATION   (United States)

^d ADVANCED MICRO DEVICES   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DEFECTS; ECONOMIC AND SOCIAL EFFECTS; SEMICONDUCTOR DEVICE MANUFACTURE;

DEFECT INSPECTION; OPTIMAL SAMPLING; REDUCING PROCESS; SAMPLING PLANS; STATE-OF-THE-ART TECHNOLOGY; WAFER INSPECTION; YIELD MANAGEMENT; YIELD RELATIONSHIP;

PLANNING;

EID: 85040338929     PISSN: 1523553X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSM.1994.729441     Document Type: Conference Paper

References (4)

1. D. J. Friedman and S. L. Albin, IEEE Transactions on Semiconductor Manufacturing., vol 4, 36-42, (1991).
2. T. J. Lorenzen and L. C. Vance, Technometrics, vol 28, 3-10, (1986).
3. R. K. Nurani and R. Akella, KLA Yield Management Seminar, (1994).
4. C. J. Spanos, Proc. of IEEE, vol 80, 819-830, (1992).