Virtual grid symbolic layout

Proceedings - Design Automation Conference

Volumn , Issue , 1981, Pages 225-233

  Weste, Neil ^a  

^a LUCENT TECHNOLOGIES   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPACTION; COMPUTER AIDED DESIGN; MASKS;

COMPACTION ALGORITHMS; DESIGN APPROACHES; DESIGN METHOD; FREEFORMS; LARGE BUILDINGS; SUB-CIRCUITS; UNIX OPERATING SYSTEM; VIRTUAL GRIDS;

C (PROGRAMMING LANGUAGE); INTEGRATED CIRCUITS;

EID: 85040272955     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/dac.1981.1585356     Document Type: Conference Paper

References (12)

1. Weste, N., "MULGA-An Interactive Symbolic Layout System for the Design of Integrated Circuits", accepted for publication in the Bell System Technical Journal.
2. Buchanan, I., "Modelling and Verification in Structured Integrated Circuit Design", PhD Thesis, University of Edinburgh, Scotland, 1980.
3. Ackland, B. and Weste, N., "Functional Verification in an Interactive Symbolic IC Design Environment", Proceedings of the 2nd. Caltech Conference on VLSI, Pasadena, CA, 1981.
4. Akers, S. B., Geyer, J. M. and Roberts, D. L., "IC Mask Layout with a Single Conductor Layer", Proceedings 7th. Design Automation Workshop, San Francisco, 1970, pp. 7-16.
5. Williams, J., "STICKS-A Graphical Compiler for High Level LSI Design", Proceedings of the 1978 NCC, May 1978, pp. 289-295.
6. Dunlop, A., "SLIP: Symbolic Layout of Integrated Circuits with Compaction", Computer Aided Design, Vol. 10, No. 6, November 1978, pp. 387-391.
7. Dunlop, A., "SLIM-The Translation of Symbolic Layouts into Mask Data", Proceedings of the 17th. Design Automation Conference, June 1980, pp. 595-602.
8. Hsueh, M. Y. and Pederson, D. O., "Computer-Aided Layout of LSI Circuit Building Blocks", Proceedings of the 1979 International Symposium on Circuits and Systems, July 1979, pp. 474-477. (also University of California, Berkeley Memo No. UCB/ERL M79/80, 10 Dec, 1979 "Symbolic Layout and Compaction of Integrated Circuits)
9. Losleben, P. and Thompson, K., "Topological Analysis for VLSI Circuits", Proceedings of the 16th Design Automation Conference, San Diego, 1979, pp. 461-473.
10. Persky, G., Deutsch, D. N. and Schweikert, D. G., "LTX - A Minicomputer-Based System for Automated LSI Layout", Journal of Design Automation and Fault-Tolerant Computing, Vol. 1, No. 3(May 1977), pp. 217-255.
11. Lopez, A. D. and Law, H. F., "A Dense Gate Matrix Layout Style for MOS LSI", IEEE Journal of Solid State Circuits, Vol. SC-15, No. 4, Aug. 1980, pp. 736-740.
12. Johannsen, D., "Bristle-Blocks", Proceedings of the 16th Design Automation Conference, San Diego, 1979, pp. 310-313.