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1
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84989413911
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Design rule checking and analysis of IC mask designs
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San Francisco, June
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B. W. Lindsay, B. T. Preas: "Design Rule Checking and Analysis of IC Mask Designs", Proc. 13th DA Conf., San Francisco, June 1976, pp. 301-308
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(1976)
Proc. 13th DA Conf.
, pp. 301-308
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Lindsay, B.W.1
Preas, B.T.2
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2
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84987192273
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The automatic recognition of silicon gate transistor geometries: An LSI design aid program
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San Francisco, June
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I. Dobes, R. Byrd: "The Automatic Recognition of Silicon Gate Transistor Geometries: An LSI Design Aid Program", Proc. 13th DA Conf., San Francisco, June 1976, pp. 327-335
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(1976)
Proc. 13th DA Conf.
, pp. 327-335
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Dobes, I.1
Byrd, R.2
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3
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0017427930
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Fast algorithms for LSI artwork analysis
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New Orleans, June
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U. S. Baird: "Fast Algorithms for LSI Artwork Analysis", Proc. 14th DA Conf., New Orleans, June 1977, pp. 303-311
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(1977)
Proc. 14th DA Conf.
, pp. 303-311
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Baird, U.S.1
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4
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33745145621
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M. S. Thesis, Dept. of Computer Sience, Rutgers University, New Brunswick, New Jersey, May
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U. S. Baird: "Design of a Family of Algorithms for Large Scale Integrated Circuit Mask Artwork Analysis", M. S. Thesis, Dept. of Computer Sience, Rutgers University, New Brunswick, New Jersey, May 1976
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(1976)
Design of a Family of Algorithms for Large Scale Integrated Circuit Mask Artwork Analysis
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Baird, U.S.1
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5
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85051644192
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LSI layout checking using bipolar device recognition technique
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June, San Diego
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C. S. Chang: "LSI Layout Checking Using Bipolar Device Recognition Technique", Proc. 16th DA Conf., June 1979, San Diego, pp. 95-101
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(1979)
Proc. 16th DA Conf.
, pp. 95-101
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Chang, C.S.1
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6
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0018328217
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Topological analysis for VLSI circuits
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June, San Diego
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P. Losleben, K. Thompson: "Topological Analysis for VLSI Circuits" Proc. 16th DA Conf., June 1979, San Diego, pp. 461-473
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(1979)
Proc. 16th DA Conf.
, pp. 461-473
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Losleben, P.1
Thompson, K.2
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7
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0039102403
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A hierarchical bit-map format for the representation of IC mask data
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June, Minneapolis
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J. A. Wilmore: "A Hierarchical Bit-Map Format For The Representation of IC Mask Data", Proc. 17th DA Conf., June 1980, Minneapolis, pp. 585-590
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(1980)
Proc. 17th DA Conf.
, pp. 585-590
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Wilmore, J.A.1
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8
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84910487071
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Simple but fast algorthms for connectivity extraction and comparison in cell based VLSI designs
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September, Warsaw
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U. Lauther: "Simple But Fast Algorthms For Connectivity Extraction and Comparison in Cell Based VLSI Designs", Proc. ECCTD 80, September 1980, Warsaw, pp. 508-514
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(1980)
Proc. ECCTD 80
, pp. 508-514
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Lauther, U.1
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9
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84912269986
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Derivation of all figures formed by the intersection of generalized polygons
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Sept.
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M. Yamin: "Derivation of All Figures Formed by the Intersection of Generalized Polygons", The Bell System Technical Journal, Vol. 51, No. 7, Sept. 1972, pp. 1595-1610
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(1972)
The Bell System Technical Journal
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, pp. 1595-1610
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Yamin, M.1
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10
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84915594275
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Network recognition of a MOS integrated circuit from its masks
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L. Szanto: "Network Recognition of a MOS Integrated Circuit from its Masks", Tesla electronics, 9(1976), pp. 67-75
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(1976)
Tesla Electronics
, vol.9
, pp. 67-75
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Szanto, L.1
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12
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0018515704
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Algorithms for reporting and counting geometric intersections
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Sept.
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J. L. Bentley, T. A. Ottmann: "Algorithms for Reporting and Counting Geometric Intersections", IEEE Trans. Comp; Vol. 6-28, No. 9, Sept. 1979, pp. 643-647
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(1979)
IEEE Trans. Comp
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Bentley, J.L.1
Ottmann, T.A.2
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14
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85033400134
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A bit map processing maschine architecture
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Lansing, Oct
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T. Blank: "A Bit Map Processing Maschine Architecture", IEEE DA Workshop, Lansing, Oct. 1980
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(1980)
IEEE DA Workshop
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Blank, T.1
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