Stress analysis of "micro-Bump Bonding structure for chip on glass" packaging

Proceedings of the 5th Asian Symposium on Information Display, ASID 1999

Volumn , Issue , 1999, Pages 79-83

  Chang, Shyh Ming ^a,b   Jon, Jwo Huei ^b   Wu, Hua Shu ^b   Lin, Hong Yu ^a   Wu, Chi Yuan ^a  

^a INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE   (Taiwan)

^b NATIONAL TSING HUA UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

CHIP SCALE PACKAGES; ELECTRIC CONNECTORS; ELECTRODES; FLIP CHIP DEVICES; INTEGRATED CIRCUITS; STRESS ANALYSIS;

BINDING FORCES; BONDING ADHESIVE; COMPLIANT BUMP; DIRECT BONDING; ELASTIC MODELING; ELECTRICAL CONNECTION; STRESS CHARACTERISTICS; SUBSTRATE ELECTRODES;

GLASS BONDING;

EID: 85040009578     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASID.1999.762718     Document Type: Conference Paper

References (2)

1. K. Hatada et al. , Proc. IEEE CHMT'89 IEMT Symp. Proc. , pp 47.
2. K. Hatada et al. , IEEE Trans. , Comp. Hybrids, Manu Technol. , vol. 13, no 3, pp. 521, Sept. 1990.