Splitting the unit delay

IEEE Signal Processing Magazine

Volumn 13, Issue 1, 1996, Pages 30-60

  Anon, ^a  

^a NONE

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BUFFER STORAGE; COMPUTER AIDED SOFTWARE ENGINEERING; COMPUTER SIMULATION; DELAY CONTROL SYSTEMS; DIGITAL FILTERS; FREQUENCY DOMAIN ANALYSIS; INTERPOLATION; LAGRANGE MULTIPLIERS; MATHEMATICAL MODELS; MODEMS; SYNCHRONIZATION;

ALLPASS FILTER; BUFFER MEMORY; DIGITAL MODEMS; FINITE IMPULSE RESPONSE FILTER; FRACTIONAL DELAY; PITCH PREDICTION; SAMPLING RATE CONVERSION;

DIGITAL SIGNAL PROCESSING;

EID: 85032783198     PISSN: 10535888     EISSN: None     Source Type: Journal    
DOI: 10.1109/79.482137     Document Type: Article

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