Equivalence fault collapsing for transistor leakage faults

Digest of Papers - 1996 IEEE International Workshop on IDDQ Testing, IDDQ 1996

Volumn , Issue , 1996, Pages 79-83

  Xiaoqing, Wen ^a   Saluja, K K ^b   Kinoshita, K ^c   Tamamoto, H ^a  

^a AKITA UNIVERSITY   (Japan)

^b University of Wisconsin Madison   (United States)

^c OSAKA UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

FAULT MODEL; IDDQ TESTING; INNOVATIVE METHOD; TRANSISTOR LEAKAGE;

EID: 85032515650     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IDDQ.1996.557836     Document Type: Conference Paper

References (9)

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3. DDQ Testing," Proc. ITC95, pp. 902-909, Oct. 1995. "
4. I. Isern and J. Figueras, "JDOQ Test and Diagnosis of CMOS Circuits," IEEE Design &Test of Computers, Vol. 3, No. 4, pp. 60-67, 1992.
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7. S. Chakravarty and P. Thadikaran, "A Study of IDDQ Subset Selection Algorithms for Bridging Faults," Proc.TTC'94, pp. 403-412, Sept. 1994.
8. X. Wen, H. Tamamoto, and K. Kinoshita, "Equivalence Fault Collapsing for Transistor Short Faults and Its Application to IDDQ Subset Selection," IDDQ'95, pp. 30-34, Oct. 1995.
9. F. Brglez and H. Fuiiwara, "A Neutral Netlist of 10 Combinational Benchmark Circuits and a Target Translator in Fortran," Proc. ISCAS'85, 1985.