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Volumn 398 LNCS, Issue , 1989, Pages 165-187

MCTL — An extension of CTL for modular verification of concurrent systems

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER CIRCUITS; DATA DESCRIPTION; MODEL CHECKING; SPECIFICATIONS;

EID: 85032183740     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-51803-7_25     Document Type: Conference Paper
Times cited : (4)

References (15)
  • 4
    • 0022012464 scopus 로고
    • Decision procedures and expressiveness in the temporal logic of branching time
    • E.A. Emerson, J.Y. Halpern: Decision procedures and expressiveness in the temporal logic of branching time. Journal of Computer and System Sciences 30, 1-24 (1985)
    • (1985) Journal of Computer and System Sciences , vol.30 , pp. 1-24
    • Emerson, E.A.1    Halpern, J.Y.2
  • 5
    • 0022514018 scopus 로고
    • Sometimes and “not never” revisited: On branching versus linear time temporal logic
    • E.A. Emerson, J.Y. Halpern: “Sometimes” and “not never” revisited: On branching versus linear time temporal logic. JACM 33, 151-178 (1986)
    • (1986) JACM , vol.33 , pp. 151-178
    • Emerson, E.A.1    Halpern, J.Y.2
  • 8
    • 84944136899 scopus 로고
    • Modelehecking of CTL formulae under liveness assumptions
    • B. Josko: Modelehecking of CTL formulae under liveness assumptions. 14th ICALP, Lecture Notes in Computer Science 267, 280-289 (1987)
    • (1987) 14Th ICALP, Lecture Notes in Computer Science , vol.267 , pp. 280-289
    • Josko, B.1
  • 11
    • 0021899094 scopus 로고
    • Hierarchical verification of asynchronous circuits using temporal logic
    • B. Mishra, E. Clarke: Hierarchical verification of asynchronous circuits using temporal logic. TCS 38, 269-291 (1985)
    • (1985) TCS , vol.38 , pp. 269-291
    • Mishra, B.1    Clarke, E.2
  • 12
    • 0038357007 scopus 로고
    • In transition from global to modular temporal reasoning about programs
    • K.R. Apt(Ed.), Springer-Verlag
    • A. Pnueli: In transition from global to modular temporal reasoning about programs. in K.R. Apt(Ed.): Logics and Models of Concurrent Systems. Springer-Verlag, 123-144 (1985)
    • (1985) Logics and Models of Concurrent Systems , pp. 123-144
    • Pnueli, A.1
  • 13
    • 0022092438 scopus 로고
    • The complexity of propositional linear temporal logic
    • A.P. Sistla, E.M. Clarke: The complexity of propositional linear temporal logic. Journal of the ACM 32, 733-749 (1985)
    • (1985) Journal of the ACM , vol.32 , pp. 733-749
    • Sistla, A.P.1    Clarke, E.M.2
  • 14
    • 85032210739 scopus 로고
    • System timing
    • C.A. Mead, L. Conway, Adison-Wesley, Reading, Mass, 1980) VMEbus, Specification manual
    • C.L. Seitz: System timing, in: C.A. Mead, L. Conway: Introduction to VLSI Systems. Adison-Wesley, Reading, Mass. (1980)
    • (1982) Introduction to VLSI Systems
    • Seitz, C.L.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.