Formal verification of digital circuits using symbolic ternary system models

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 531 LNCS, Issue , 1991, Pages 33-43

  Bryant, Randal E ^a   Seger, Carl Johan H ^b  

^a CARNEGIE MELLON UNIVERSITY   (United States)

^b UNIVERSITY OF BRITISH COLUMBIA   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED ANALYSIS; DIGITAL CIRCUITS; TERNARY SYSTEMS; TIMING CIRCUITS;

BINARY VALUES; BOOLEAN EXPRESSIONS; LOGIC OPERATORS; SYSTEM MODELING; SYSTEM STATE;

FORMAL VERIFICATION;

EID: 85030757466     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/BFb0023717     Document Type: Conference Paper

References (7)

1. D. L. Beatty, R. E. Bryant, and C.-J. H. Seger, “Synchronous Circuit Verification by Symbolic Simulation: An Illustration,” Sixth MIT Conference on Advanced Research in VLSI, 1990.
2. S. Bose, and A. L. Fisher, “Automatic Verification of Synchronous Circuits using Symbolic Logic Simulation and Temporal Logic,” IMEC-IFIP International Workshop on Applied Formal Methods for Correct VLSI Design, 1989, pp. 759-764.
3. R. E. Bryant, D. Beatty, K. Brace, K. Cho, and T. Sheffler, “COSMOS: a Compiled Simulator for MOS Circuits,” 24th Design Automation Conference, 1987, 9-16.
4. R. E. Bryant, “Boolean Analysis of MOS Circuits”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. CAD-6, No. 4 (July, 1987), 634-649.
5. R. E. Bryant, “Formal Verification of Memory Circuits by Switch-Level Simulation,” To appear in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1990.
6. J. A. Brzozowski, and M. Yoeli. “On a Ternary Model of Gate Networks”. IEEE Transactions on Computers C-28, 3 (March 1979), 178-183.
7. C-J. Seger, and R. E. Bryant, “Modeling of Circuit Delays in Symbolic Simulation”, IMEC-IFIP International Workshop on Applied Formal Methods for Correct VLSI Design, 1989, pp. 625-639.