Exploiting symmetry in temporal logic model checking

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 697 LNCS, Issue , 1993, Pages 450-462

  Clarke, E M ^a   Filkorn, T ^b   Jha, S ^a  

^a CARNEGIE MELLON UNIVERSITY   (United States)

^b SIEMENS AG   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED ANALYSIS; COMPUTER CIRCUITS; TEMPORAL LOGIC;

CACHE COHERENCY PROTOCOL; CRITICAL STEPS; FINITE STATE SYSTEMS; FINITE-STATE CONCURRENT SYSTEM; LOGIC MODEL CHECKING; TEMPORAL LOGIC FORMULA; TEMPORAL PROPERTY; TRANSITION RELATIONS;

MODEL CHECKING;

EID: 85029430850     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-56922-7_37     Document Type: Conference Paper

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