A Modular Shared L2 Memory Design for 3-D Integration

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 23, Issue 8, 2015, Pages 1485-1498

  Azarkhish, Erfan ^a   Rossi, Davide ^a   Loi, Igor ^a   Benini, Luca ^b  

^a UNIVERSITY OF BOLOGNA   (Italy)

^b ETH ZURICH   (Switzerland)

Author keywords

3 D integration; nonuniform memory access (NUMA); physical implementation; tightly coupled data memory

Indexed keywords

BENCHMARKING; CLOCKS; CLOSED LOOP CONTROL SYSTEMS; COST REDUCTION; DISTRIBUTED COMPUTER SYSTEMS; ELECTRONICS PACKAGING; INTEGRATED CIRCUIT DESIGN; INTEGRATED CIRCUIT INTERCONNECTS; INTEGRATED CIRCUIT MANUFACTURE; INTEGRATION; MICROPROCESSOR CHIPS; NETWORK-ON-CHIP; THREE DIMENSIONAL INTEGRATED CIRCUITS; VLSI CIRCUITS;

3-D INTEGRATION; DATA MEMORY; LOW COST MANUFACTURING; LOW POWER TECHNOLOGIES; MULTI-CORE PLATFORMS; NON UNIFORM MEMORY ACCESS; PHYSICAL IMPLEMENTATION; TEMPERATURE REDUCTION;

MEMORY ARCHITECTURE;

EID: 85027922506     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2014.2340013     Document Type: Article

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