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Volumn , Issue , 1993, Pages 150-157

A multi-cycle operational signal processing core for an adaptive equalizer for magnetic system application

Author keywords

[No Author keywords available]

Indexed keywords

EQUALIZERS; FIR FILTERS; IIR FILTERS; MAXIMUM LIKELIHOOD; VLSI CIRCUITS;

EID: 85027154147     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSISP.1993.404492     Document Type: Conference Paper
Times cited : (4)

References (4)
  • 1
    • 0027814562 scopus 로고
    • Digital timing recovery circuit with feedback delay compensators for magnetic recording systems
    • T. Takashi, et al., "Digital Timing Recovery Circuit with Feedback Delay Compensators for Magnetic Recording Systems, " 1993 Symposium on VLSI Circuits, pp.77-78, 1993.
    • (1993) 1993 Symposium on VLSI Circuits , pp. 77-78
    • Takashi, T.1
  • 2
    • 85064809836 scopus 로고
    • A 27MHz mixed analog/digital magnetic recording channel dsp using partial response signalling with maximum likelihood detection
    • T. J. Schmerbeck, el al., "A 27MHz Mixed Analog/Digital Magnetic Recording Channel DSP Using Partial Response Signalling with Maximum Likelihood Detection, " IEEE ISSCC "91 TP8.3, 1993.
    • (1993) IEEE ISSCC "91 TP8.3
    • Schmerbeck, T.J.1
  • 3
    • 85064803225 scopus 로고
    • An adaptive equalizing, maximum likelihood decoding lsi for magnetic recording systems
    • S.Tanaka, et al., "An Adaptive Equalizing, Maximum Likelihood Decoding LSI for Magnetic Recording Systems, " IEEE ISSCC'93 FA13.5, 1993.
    • (1993) IEEE ISSCC'93 FA13.5
    • Tanaka, S.1
  • 4
    • 85064841885 scopus 로고
    • A 20ns CMOS micro-DSP core for video signal processing
    • T. Baji, et al., "A 20ns CMOS Micro-DSP Core for Video Signal Processing, " IEEE ISSCC '88, pp.156-157, 1988.
    • (1988) IEEE ISSCC '88 , pp. 156-157
    • Baji, T.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.