Etch Process development for FLARE™ for dual damascene architecture using a N2/O2 plasma

Proceedings of the IEEE 1999 International Interconnect Technology Conference, IITC 1999

Volumn , Issue , 1999, Pages 59-61

  Thompson, H W ^b   Vanhaelemeersch, S ^a   Maex, K ^c   Van Ammel, A ^a   Beyer, G ^a   Coenegrachts, B ^a   Vervoort, I ^a   Waeterloos, J ^a   Struyf, H ^a   Palmans, R ^a   Forester, L ^d  

^a IMEC   (Belgium)

^b IMEC from AlliedSignal Inc   (Belgium)

^c UNIVERSITY OF LEUVEN   (Belgium)

^d HONEYWELL   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUIT INTERCONNECTS; TEMPERATURE;

ALLIEDSIGNAL; DAMASCENE STRUCTURE; DUAL DAMASCENE ARCHITECTURE; ETCH PROCESS; ETCH PROFILE; LOW TEMPERATURES; OXYGEN RATIOS; TRENCH ETCH;

REACTIVE ION ETCHING;

EID: 85025683311     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IITC.1999.787078     Document Type: Conference Paper

References (5)

1. D. Edelstein, et al IEDM Tech. Dig., p 773, 1997
2. S. Venkatesan, et al IEDM Tech. Dig., p 769, 1997
3. C. Chang, et al Proceedings of the IITC, p. 3, 1998
4. T. Mantei, JOM, p. 36, 1994
5. S. Cain, et al J Vac. Sci. Technol., Vol. A5 (4), p. 1578, 1987