Evolvable platform for array processing: A one-chip approach

Proceedings of the 7th International Conference on Microelectronics for Neural, Fuzzy and Bio-Inspired Systems, MicroNeuro 1999

Volumn , Issue , 1999, Pages 187-193

  Girau, B ^a   Marchal, P ^a   Nussbaum, P ^a   Tisserand, A ^a   Restrepo, H F ^b  

^a CSEM   (Switzerland)

^b EPFL   (Switzerland)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC POWER UTILIZATION; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); FUZZY INFERENCE; FUZZY LOGIC; MICROELECTRONICS;

ALTERNATIVE STRUCTURE; ASYNCHRONOUS COMMUNICATION; CELL ARCHITECTURES; COMPLEX ALGORITHMS; FIELD PROGRAMMABLES; LOW-POWER CONSUMPTION; MICROPROCESSOR DESIGNS; PARALLEL PROCESSING;

ARRAY PROCESSING;

EID: 85024278522     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MN.1999.758863     Document Type: Conference Paper

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