-
1
-
-
0000793139
-
Cramming more components onto integrated circuits
-
G.E. Moore, Cramming more components onto integrated circuits, Electronics 38, 114 (1965).
-
(1965)
Electronics
, vol.38
, Issue.114
-
-
Moore, G.E.1
-
2
-
-
3142722173
-
Limits to binary logic switch scaling-A gedanken model
-
V.V. Zhirnov et al., Limits to binary logic switch scaling-A gedanken model, Proc. of IEEE 9, 1934 (2003).
-
(2003)
Proc. of IEEE
, vol.9
, pp. 1934
-
-
Zhirnov, V.V.1
-
3
-
-
84889633757
-
Overview of beyond-CMOS devices and a uniform methodology for their benchmarking
-
D.E. Nikonov et al., Overview of beyond-CMOS devices and a uniform methodology for their benchmarking, Proc. of IEEE 101, 2498 (2013).
-
(2013)
Proc. of IEEE
, vol.101
, pp. 2498
-
-
Nikonov, D.E.1
-
5
-
-
26644474574
-
High-performance carbon nanotube field-effect transistor with tunable polarities
-
Y.M. Lin et al., High-performance carbon nanotube field-effect transistor with tunable polarities, IEEE Transactions Nanotechnol. 4:5, 481, (2005).
-
(2005)
IEEE Transactions Nanotechnol
, vol.4
, Issue.5
, pp. 481
-
-
Lin, Y.M.1
-
6
-
-
84861659653
-
Graphene barristor, a triode device with a gate-controlled schottky barrier
-
H. Yang et al., Graphene barristor, a triode device with a gate-controlled schottky barrier, Science 336, 1140, (2012).
-
(2012)
Science
, vol.336
, pp. 1140
-
-
Yang, H.1
-
7
-
-
0027266749
-
Quantum cellular automata
-
C.S. Lent et al., Quantum cellular automata, Nanotechnology 4:1, 49, (1993).
-
(1993)
Nanotechnology
, vol.4
, Issue.1
, pp. 49
-
-
Lent, C.S.1
-
8
-
-
84858983672
-
Non-volatile magnonic logic circuits engineering
-
A. Khitun et al., Non-volatile magnonic logic circuits engineering, Journal of Applied Physics 110:3, 034306, (2011).
-
(2011)
Journal of Applied Physics
, vol.110
, Issue.3
, pp. 034306
-
-
Khitun, A.1
-
9
-
-
77950864797
-
Proposal for an all-spin logic device with built-in memory
-
B. Behin-Aein et al., Proposal for an all-spin logic device with built-in memory, Nature Nanotechnology 5:4 266, (2010).
-
(2010)
Nature Nanotechnology
, vol.5
, Issue.4
, pp. 266
-
-
Behin-Aein, B.1
-
10
-
-
0034712032
-
Room temperature magnetic quantum cellular automata
-
R.P. Cowburn et al., Room temperature magnetic quantum cellular automata, Science 287:5457, 1466, (2000).
-
(2000)
Science
, vol.287
, Issue.5457
, pp. 1466
-
-
Cowburn, R.P.1
-
11
-
-
0043197342
-
Nanocomputing by field-coupled nanomagnets
-
G. Csaba et al., Nanocomputing by field-coupled nanomagnets, IEEE Transactions Nanotechnol. 1:4, 209, (2002).
-
(2002)
IEEE Transactions Nanotechnol
, vol.1
, Issue.4
, pp. 209
-
-
Csaba, G.1
-
12
-
-
0031123840
-
A device architecture for computing with quantum dots
-
C.S. Lent et al., A device architecture for computing with quantum dots, Proceedings of the IEEE 85:4, 541, (1997).
-
(1997)
Proceedings of the IEEE
, vol.85
, Issue.4
, pp. 541
-
-
Lent, C.S.1
-
13
-
-
78149463275
-
Bennett clocking of nanomagnetic logic using multiferroic single-domain nanomagnets
-
J. Atulasimha et al., Bennett clocking of nanomagnetic logic using multiferroic single-domain nanomagnets, Applied Physics Letters 97:17, 173105, (2010).
-
(2010)
Applied Physics Letters
, vol.97
, Issue.17
, pp. 173105
-
-
Atulasimha, J.1
-
14
-
-
84903130344
-
Majority-inverter graph: A novel data-structure and algorithms for efficient logic optimization
-
L. Amarù et al., Majority-Inverter Graph: A Novel Data-Structure and Algorithms for Efficient Logic Optimization, IEEE/ACM Design Automation Conference, (2014).
-
(2014)
IEEE/ACM Design Automation Conference
-
-
Amarù, L.1
-
15
-
-
85020229726
-
Boolean logic optimization in majority-inverter graphs
-
L. Amarù et al., Boolean logic optimization in majority-inverter graphs IEEE/ACM Design Automation Conference, (2015).
-
(2015)
IEEE/ACM Design Automation Conference
-
-
Amarù, L.1
-
18
-
-
0032164772
-
Wave-pipelining: A tutorial and research survey
-
W.P. Burleson et al., Wave-pipelining: a tutorial and research survey, IEEE Transactions on VLSI systems 6:3, 464, (1998).
-
(1998)
IEEE Transactions on VLSI Systems
, vol.6
, Issue.3
, pp. 464
-
-
Burleson, W.P.1
-
19
-
-
84904738719
-
Non-linear capacitance or inductance switching, amplifying, and memory organs
-
US Patent
-
J. Von Neumann, Non-linear capacitance or inductance switching, amplifying, and memory organs, US Patent 2,815,488, (1957).
-
(1957)
-
-
Von Neumann, J.1
-
22
-
-
85020175271
-
Design and benchmarking of hybrid CMOS-spin wave device circuits compared to 10nm CMOS
-
O. Zografos et al., Design and benchmarking of hybrid CMOS-Spin Wave Device Circuits compared to 10nm CMOS, IEEE Conference on Nanotechnology, (2015).
-
(2015)
IEEE Conference on Nanotechnology
-
-
Zografos, O.1
-
23
-
-
84929154215
-
Non-volatile clocked spin wave interconnect for beyond-CMOS nanomagnet pipelines
-
S. Dutta et al., Non-volatile clocked spin wave interconnect for beyond-CMOS nanomagnet pipelines, Scientific Reports 5, (2015).
-
(2015)
Scientific Reports
, vol.5
-
-
Dutta, S.1
-
24
-
-
84880772118
-
Experimental demonstration of a 1-bit full adder in perpendicular nanomagnetic logic
-
S. Breitkreutz et al., Experimental demonstration of a 1-bit full adder in perpendicular nanomagnetic logic, IEEE Transactions on Magnetics 49:7, 4464, (2013).
-
(2013)
IEEE Transactions on Magnetics
, vol.49
, Issue.7
, pp. 4464
-
-
Breitkreutz, S.1
-
26
-
-
84938166141
-
Very high-speed computing systems
-
M.J. Flynn, Very high-speed computing systems, Proceedings of the IEEE 54:12, 1901, (1966).
-
(1966)
Proceedings of the IEEE
, vol.54
, Issue.12
, pp. 1901
-
-
Flynn, M.J.1
-
27
-
-
0026869432
-
A bipolar population counter using wave pipelining to achieve 2.5?normal clock frequency
-
D.C. Wong et al., A bipolar population counter using wave pipelining to achieve 2.5?normal clock frequency, IEEE Journal of solid-state circuits 27:5, 745, (1992).
-
(1992)
IEEE Journal of Solid-state Circuits
, vol.27
, Issue.5
, pp. 745
-
-
Wong, D.C.1
-
28
-
-
43949131048
-
Wave pipelining using self reset logic
-
M.E. Litvin et al., Wave pipelining using self reset logic, VLSI Design 2:6, (2008).
-
(2008)
VLSI Design
, vol.2
, pp. 6
-
-
Litvin, M.E.1
-
29
-
-
4143052654
-
Designing high-performance digital circuits using wave pipelining: Algorithms and practical experiences
-
D.C. Wong et al., Designing high-performance digital circuits using wave pipelining: Algorithms and practical experiences, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 12:1, 25, (1993).
-
(1993)
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
, vol.12
, Issue.1
, pp. 25
-
-
Wong, D.C.1
-
30
-
-
0028496060
-
A 250-mhz wave pipelined adder in 2-m CMOS
-
W. Liu et al., A 250-MHz wave pipelined adder in 2-m CMOS, IEEE Journal of Solid-State Circuits 29:9, 1117, (1994).
-
(1994)
IEEE Journal of Solid-State Circuits
, vol.29
, Issue.9
, pp. 1117
-
-
Liu, W.1
-
31
-
-
85020220766
-
A sudden power-outage resilient nonvolatile microprocessor for immediate system recovery
-
N. Onizawa et al., A sudden power-outage resilient nonvolatile microprocessor for immediate system recovery, IEEE Conference on Nanotechnology, (2015).
-
(2015)
IEEE Conference on Nanotechnology
-
-
Onizawa, N.1
-
32
-
-
84876532836
-
Nonvolatile logic-in-memory array processor in 90nm mtj/mos achieving 75% leakage reduction using cycle-based power gating
-
M. Natsui et al., Nonvolatile logic-in-memory array processor in 90nm MTJ/MOS achieving 75% leakage reduction using cycle-based power gating, IEEE International Solid-State Circuits Conference, (2013).
-
(2013)
IEEE International Solid-State Circuits Conference
-
-
Natsui, M.1
|