Direct methods for synthesis of self-monitoring state machines

FTCS 1992 - 22nd Annual International Symposium on Fault-Tolerant Computing

Volumn , Issue , 1992, Pages 306-315

  Robinson, S H ^a   Shen, J P ^a  

^a CARNEGIE MELLON UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED DESIGN; FAULT TOLERANCE; FAULT TOLERANT COMPUTER SYSTEMS;

AUTOMATED SYNTHESIS; CONSISTENT STATE; CONTINUOUS MONITORING; DIRECT METHOD; SELF-MONITORING; STATE MACHINE; SYNTHESIS ALGORITHMS; SYNTHESIS METHOD;

STATE ASSIGNMENT;

EID: 85017399649     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FTCS.1992.243570     Document Type: Conference Paper

References (16)

1. J. Hartmanis and R. E. Stearns. Algebraic Structure Theory of Sequential Machines. Prentice-Hall, 1966.
2. L. P. Holmquist and L. L. Kinney. "Error Detection With Latency In Sequential Circuits. " In Proc. 18th IEEE ITC, IEEE, September 1988, pages 926-933.
3. L. P. Holmquist and L. L. Kinney. "Concurrent Error Detection For Restricted Fault Sets In Sequential Circuits And Microprogrammed Control Units Using Convolutional Codes. " In Proc. IEEE rfC'91, IEEE, October 1991, pages 926-935.
4. V. S. Iyengar and L. L. Kinney. "Concurrent Fault Detection in Microprogrammed Control Units, " IEEE Trans. CompuJers, C-34 (9): 810-821, September 1985.
5. z. Kohavi. Switching and Finite Aatomata Theory. McGraw Hill, second edition, 1978.
6. R. Leveugle and G. Saucier. "Concurrent Checking in Dedicated Controllers. " In Proc. ICCD, IEEE, October 1989, pages 124-127.
7. R. Leveugle and G. Saucier. "Optimized Synthesis of Dedicated Controllers with Concurrent Checking Capabilities. " In Proc. 19th IEEE ITC, IEEE, August 1989, pages 355-363.
8. R. Leveugle and G. Saucier. "Optimized Synthesis of Concurrently Checked Controllers, " IEEE Trans. CompuJers, 39 (4): 419-425, April 1990.
9. R. Lisanke. "Logic Synthesis and Optimization Benchmarks User Guide: Version 2. 0, " Technical report, Microelectronics Center of North Carolina, December 1988.
10. A. Mahmood and E. J. McCluskey. "Concurrent Error Detection Using Watchdog Processors-A Survey, " IEEE Trans. CompuJers, 37 (2): 160-174, February 1988.
11. R. A. Parekhji, G. Venkatesh, and S. D. Sherlekar. "A Methodology for Designing Optimal Self-Checking Sequential Circuits. " In Proc. IEEE rfC'9I, IEEE, October 1991, pages 283-291.
12. S. H. Robinson. Finite-State Machine Synthesis For Continuous, Concurrent Error Detection Using Signature-Invariant Monitoring. PhD thesis, Carnegie Mellon University, May 1992.
13. S. H. Robinson and J. P. Shen. "Evaluation and Synthesis of SelfMonitoring State Machines. " In Proc. ICCAD, IEEE, November 1990, pages 276-279.
14. S. H. Robinson and J. P. Shen. "Theory and Algorithms for Self-Monitoring State Machines, " TechReport CMUCAD-90-31, Carnegie Mellon University, August 1990.
15. J. Wakerly. Error Detecting Codes, Self-Checking Circuits and Applications. Elsevier Science, 1978.
16. K. Wilken and J. P. Shen. "Contiuous Signature Monitoring: Low-Cost Concurrent-Detection of Processor Control Errors, " IEEE Trans. Computer-AidedDesign, 9 (6): 629-641, June 1990.