Standby-Power-Free Integrated Circuits Using MTJ-Based VLSI Computing

Proceedings of the IEEE

Volumn 104, Issue 10, 2016, Pages 1844-1863

  Hanyu, Takahiro ^a   Endoh, Tetsuo ^a   Suzuki, Daisuke ^a   Koike, Hiroki ^a   Ma, Yitao ^a   Onizawa, Naoya ^a   Natsui, Masanori ^a   Ikeda, Shoji ^a   Ohno, Hideo ^a  

^a TOHOKU UNIVERSITY   (Japan)

Author keywords

Field programmable gate array; image recognition; logic in memory architecture; magneto resistive RAM; microcontroller unit (MCU); MTJ device; MTJ MOS hybrid circuit; nonvolatile LSI; power gating; standby power; ternary content addressable memory

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTATION THEORY; EMBEDDED SYSTEMS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); IMAGE RECOGNITION; LOGIC GATES; MAGNETIC DEVICES; MEMORY ARCHITECTURE; RANDOM ACCESS STORAGE; STANDBY POWER SYSTEMS; TIMING CIRCUITS; TUNNEL JUNCTIONS; VLSI CIRCUITS;

LOGIC-IN-MEMORY ARCHITECTURE; MICROCONTROLLER UNIT; MTJ DEVICE; NON-VOLATILE; POWER GATINGS; STANDBY POWER; TERNARY CONTENT ADDRESSABLE MEMORY;

COMPUTER CIRCUITS;

EID: 85017095197     PISSN: 00189219     EISSN: 15582256     Source Type: Journal    
DOI: 10.1109/JPROC.2016.2574939     Document Type: Article

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