Low-latency plesiochronous data retiming

Proceedings - 16th Conference on Advanced Research in VLSI, ARVLSI 1995

Volumn , Issue , 1995, Pages 304-315

  Dennison, L R ^a   Dally, W J ^a   Xanthopoulos, D ^a  

^a MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

VLSI CIRCUITS;

APPLICATION AREA; LOW LATENCY; MINIMAL SUPPORTS; NO FLOWS; PARALLEL COMPUTER; RETIMING; TRANSMITTER AND RECEIVER;

COMPUTER NETWORKS;

EID: 85016748835     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ARVLSI.1995.515628     Document Type: Conference Paper

References (4)

1. W.J. Dally, L.R. Dennison, D. Harris, K. Kan, T. Xanthopoulos, "Architecture and Implementation of the Reliable Router, " In Hot Interconnects II: 1994 Symposium Record.
2. D.G. Messerschmitt, "Synchronization in Digital System Design", IEEE Journal on Selected Areas in Communications, vol. 8, no. 8, October 1990.
3. R.D. Rettberg and L.A. Glasser, U.S. Patent 4, 700, 347, October 13, 1987.
4. W.K. Stewart and S. Ward, "A Solution to a Special Case of the Synchronization Problem, " IEEE Transactions on Computers, vol. 37, no. 1, January 1988.