Improving main memory hash joins on intel xeon phi processors: An experimental approach

Proceedings of the VLDB Endowment

Volumn 8, Issue 6 6, 2015, Pages 642-653

  Jha, Saurabh ^a   He, Bingsheng ^a   Lu, Mian ^b   Cheng, Xuntao ^c   Huynh, Huynh Phung ^b  

^a NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

^b AGENCY FOR SCIENCE   (Singapore)

^c NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

Author keywords

[No Author keywords available]

Indexed keywords

COPROCESSOR; HASH FUNCTIONS; QUERY PROCESSING;

ARCHITECTURAL FEATURES; CO-PROCESSORS; DESIGN AND IMPLEMENTATIONS; FEATURES OPTIMIZATIONS; HASH JOIN; JOIN ALGORITHM; MAIN-MEMORY; MANY-CORE; MULTI-CORES; SINGLE-CHIP;

PROGRAM PROCESSORS;

EID: 85013671725     PISSN: None     EISSN: 21508097     Source Type: Journal    
DOI: 10.14778/2735703.2735704     Document Type: Conference Paper

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