Backward-annotation of post-layout delay information into high-level synthesis process for performance optimization

ICVC 1999 - 6th International Conference on VLSI and CAD

Volumn , Issue , 1999, Pages 25-28

  Park, Sanghun ^a   Kim, Kihyun ^a   Chang, Hyunseok ^b   Jeon, Jiahwan ^b   Choi, Kiyoung ^a  

^a Hyundai MicroElectron Co Ltd   (South Korea)

^b Seoul National University   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 85013588458     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICVC.1999.820808     Document Type: Conference Paper

References (15)

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