CSP Technology and High Aspect Ratio Bumps

Journal of The Japan Institute of Electronics Packaging

Volumn 2, Issue 1, 1999, Pages 35-39

  Fukui, Keisuke ^a   Ayama, Masayuki ^a   Hayashi, Katsuhiko ^b   Yoneda, Taisuke ^b   Tanaka, Zennosuke ^b   Kondo, Kazuo ^b  

^a UNIVERSITY OF HYOGO   (Japan)

^b OKAYAMA UNIVERSITY   (Japan)

Author keywords

Bump; Chip Size Package; Computational Fluid; Electrodeposition; High Aspect Ratio Cavity; Natural Convection

Indexed keywords

EID: 85009552847     PISSN: 13439677     EISSN: 1884121X     Source Type: Journal    
DOI: 10.5104/jiep.2.35     Document Type: Article

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