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Volumn 1, Issue 3, 2008, Pages 1-21

An Open-Source HyperTransport Core

Author keywords

Design; FPGA; HTX; HyperTransport; prototyping; RTL; Verification

Indexed keywords


EID: 85009377317     PISSN: 19367406     EISSN: 19367414     Source Type: Journal    
DOI: 10.1145/1391732.1391734     Document Type: Article
Times cited : (20)

References (10)
  • 1
    • 85024270481 scopus 로고    scopus 로고
    • AMD BIOS and kernel developer's guide for the AMD Athlon 64 and AMD Opteron processors
    • 26094, rev 3.3
    • ADVANCED MICRO DEVICES. 2006. AMD BIOS and kernel developer's guide for the AMD Athlon 64 and AMD Opteron processors, 26094, rev 3.3.
    • (2006)
  • 2
    • 26444607452 scopus 로고    scopus 로고
    • A hypertransport chip-to-chip interconnect tunnel developed using systemC
    • Montreal, Canada. IEEE Computer Society, Washington, DC
    • Castonguay, A., Savaria, Y., 2005. A hypertransport chip-to-chip interconnect tunnel developed using systemC. In Proceedings of the 16th International Workshop on Rapid System Prototyping, Montreal, Canada. IEEE Computer Society, Washington, DC, 264-266.
    • (2005) Proceedings of the 16th International Workshop on Rapid System Prototyping , pp. 264-266
    • Castonguay, A.1    Savaria, Y.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.