메뉴 건너뛰기




Volumn Part F129531, Issue , 1994, Pages 158-170

Avoiding conflict misses dynamically in large direct-mapped caches

Author keywords

[No Author keywords available]

Indexed keywords

HARDWARE;

EID: 85008925906     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/195473.195527     Document Type: Conference Paper
Times cited : (31)

References (28)
  • 1
    • 0027192667 scopus 로고
    • Column-Associative caches: A technique for reducing the miss rate of direct mapped caches
    • [Agarwal & Pudar 93] May
    • [Agarwal & Pudar 93] Agarwal, A. and Pudar, S. D. Column-Associative Caches: A Technique for Reducing the Miss Rate of Direct Mapped Caches. In Proc. 20th Annual International Symposium On Computer Architecture, pages 179-190, May 1993.
    • (1993) Proc. 20th Annual International Symposium On Computer Architecture , pp. 179-190
    • Agarwal, A.1    Pudar, S.D.2
  • 6
    • 85031011050 scopus 로고
    • Software methods for system address tracing
    • [Chen 93] IEEE Computer Society Press, October
    • [Chen 93] Chen, J. B. Software Methods for System Address Tracing. In Proceedings of the 4th Workshop On Workstation Operating Systems, pages 178-185. IEEE Computer Society Press, October 1993.
    • (1993) Proceedings of the 4th Workshop On Workstation Operating Systems , pp. 178-185
    • Chen, J.B.1
  • 10
    • 4243171369 scopus 로고
    • The design of the DEC 3000 AXP systems, Two high-performance workstations
    • [Dutton et al. 92]
    • [Dutton et al. 92] Dutton, T., Eiref, D., Kurth, H., Reisert, J., Stewart, R. The Design of the DEC 3000 AXP Systems, Two High-Performance Workstations. Digital Technical Journal, 4(4):66-81, 1992. Special Issue.
    • (1992) Digital Technical Journal , vol.4 , Issue.4 , pp. 66-81
    • Dutton, T.1    Eiref, D.2    Kurth, H.3    Reisert, J.4    Stewart, R.5
  • 11
    • 0003789873 scopus 로고
    • [Hill 87] PhD dissertation, University of California at Berkeley, Computer Sciences Division, November Number UCB/CSD 87/381
    • [Hill 87] Hill, M. D. Aspects of Cache Memory and Instruction Buffer Performance. PhD dissertation, University of California at Berkeley, Computer Sciences Division, November 1987. Number UCB/CSD 87/381.
    • (1987) Aspects of Cache Memory and Instruction Buffer Performance
    • Hill, M.D.1
  • 12
    • 0024173488 scopus 로고
    • A case for Direct-Mapped caches
    • [Hill 88] December
    • [Hill 88] Hill, M. D. A Case for Direct-Mapped Caches. IEEE Computer, pages 25-40, December 1988.
    • (1988) IEEE Computer , pp. 25-40
    • Hill, M.D.1
  • 13
    • 0027884550 scopus 로고
    • Protection traps and alternatives for memory management of an object oriented language
    • [Hosking & Moss 93] December
    • [Hosking & Moss 93] Hosking, A. L. and Moss, J. E. B. Protection Traps and Alternatives for Memory Management of an Object Oriented Language. In Proceedings of the 14th ACM Symposium on Operating System Principles, pages 106-119, December 1993.
    • (1993) Proceedings of the 14th ACM Symposium On Operating System Principles , pp. 106-119
    • Hosking, A.L.1    Moss, J.E.B.2
  • 15
    • 0025429331 scopus 로고
    • Improving Direct-Mapped cache performance by the addition of a small Fully-Associative cache and prefetch buffers
    • [Jouppi 90] May
    • [Jouppi 90] Jouppi, N. P. Improving Direct-Mapped Cache Performance by the Addition of a Small Fully-Associative Cache and Prefetch Buffers. In Proceedings of the 17th Annual International Symposium On Computer Architecture, pages 364-373, May 1990.
    • (1990) Proceedings of the 17th Annual International Symposium On Computer Architecture , pp. 364-373
    • Jouppi, N.P.1
  • 16
    • 0004088729 scopus 로고
    • [Kane 88] Prentice-Hall, Englewood Cliffs, NJ
    • [Kane 88] Kane, G. MIPS RISC Architecture. Prentice-Hall, Englewood Cliffs, NJ 1988.
    • (1988) MIPS RISC Architecture
    • Kane, G.1
  • 17
    • 84976736383 scopus 로고
    • Page placement algorithms for large real-indexed caches
    • [Kessler fc Hill 92] November
    • [Kessler fc Hill 92] Kessler R., Hill M. D. Page Placement Algorithms for Large Real-Indexed Caches. ACM Transactions on Computer Systems 10(4)338-359 November 1992.
    • (1992) ACM Transactions On Computer Systems , vol.10 , Issue.4 , pp. 338-359
    • Kessler, R.1    Hill, M.D.2
  • 24
    • 84976653161 scopus 로고
    • [ULT 89] ULTRIX Documentation Group, Digital Equipment Corporation Order number AA-NE13A-TE
    • [ULT 89] ULTRIX Documentation Group, Digital Equipment Corporation. ULTRIX Documentation Overview for RISC Processors, 1989. Order number AA-NE13A-TE.
    • (1989) ULTRIX Documentation Overview for RISC Processors
  • 28
    • 0022583630 scopus 로고
    • An In-Cache address translation mechanism
    • [Wood 86] IEEE Computer Society Press, June
    • [Wood 86] Wood, D. A. An In-Cache Address Translation Mechanism. In Proceedings of the 13th Annual Symposium on Computer Architecture, pages 358-365. IEEE Computer Society Press, June 1986.
    • (1986) Proceedings of the 13th Annual Symposium On Computer Architecture , pp. 358-365
    • Wood, D.A.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.