Practical issues in the use of ABFT and a new failure model

Digest of Papers - 28th Annual International Symposium on Fault-Tolerant Computing, FTCS 1998

Volumn 1998-January, Issue , 1998, Pages 26-35

  Silva, João Gabriel ^a   Prata, Paula ^b   Rela, Mário ^a   Madeira, Henrique ^a  

^a UNIVERSITY OF COIMBRA   (Portugal)

^b UNIVERSITY OF BEIRA INTERIOR   (Portugal)

Author keywords

ABFTs; Assertions; Error detection methods; Failure models; Fault injection

Indexed keywords

APPLICATION PROGRAMS; DIGITAL ARITHMETIC; SOFTWARE TESTING;

ABFTS; ASSERTIONS; DETECTION METHODS; FAILURE MODEL; FAULT INJECTION;

FAULT TOLERANCE;

EID: 85008453949     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FTCS.1998.689452     Document Type: Conference Paper

References (24)

1. D. Powell, P. Veríssimo, G. Bonn, F. Waeselynck, and D. Seaton., “The Delta-4 Approach to Dependability in Open Distributed Computing Systems,” presented at FTCS-18, Tokyo, 1988.
2. H. Madeira and J. G. Silva, “Experimental Evaluation of the Fail-Silent Behavior in Computers Without Error Masking,” presented at 24 th International Symposium on Fault Tolerant Computing Systems, Austin-Texas, 1994.
3. M. Z. Rela, H. Madeira, and J. G. Silva, “Experimental Evaluation of the Fail-Silent Behavior of Programs with Consistency Checks,” presented at FTCS-26, Sendai-Japan, 1996.
4. J. G. Silva, J. Carreira, H. Madeira, D. Costa, and F. Moreira, “Experimental Assessment of Parallel Systems,” presented at Twenty-Sixth Annual International Symposium on Fault-Tolerant Computing, Sendai,Japan, 1996.
5. K.-H. Huang and J. A. Abraham, “Algorithm-Based Fault Tolerance for Matrix Operations,” IEEE Trans. on Computers, vol. C-33, pp. 518-528, 1984.
6. P. Banerjee, J. T. Rameh, C. Stunkel, V. S. Nair, K. Roy, V. Balasubramanian, and J. A. Abraham, “Algorithm-Based Fault Tolerance on Hypercube Multiprocessors,” IEEE Trans. Comput., vol. 39, pp. 1132-1145, 1990.
7. A. R. Chowdhury and P. Banerjee, “Algorithm-Based Fault Location and Recovery for Matrix Computations,” presented at 24th Int. Symposium on Fault Tolerant Systems, Austin, Texas, 1994.
8. Y.-H. Choi and M. Malek, “A Fault-Tolerant FFT processor,” IEEE Trans. on Computers, vol. 37, pp. 617-621, 1988.
9. A. R. Chowdhury and P. Banerjee, “Compiler-Assisted Generation of Error Detection Parallel Programs,” presented at 26th Int. Symposium on Fault Tolerant Systems, Sendai, Japan, 1996.
10. A. R. Chowdhury and P. Banerjee, “Tolerance Determination for Algorithm-Based Checks Using Simplified Error Analysis Techniques,” presented at 23th Int. Symposium on Fault Tolerant Systems, 1993.
11. P. Banerjee and J. A. Abraham, “Bounds on Algoritthm-Based Fault Tolerance in Multiple Processor Systems,” IEEE Trans. Comput., vol. C-35, pp. 296-306, 1986.
12. B. Vinnakota and N. K. Jha, “Design of Algorithm-Based Fault-Tolerant Multiprocessor Systems for Concurrent Error Detection and Fault Diagnosis,” IEEE Trans. on Parallel and Distributed Systems, vol. 5, pp. 1099-1106, 1994.
13. S. Yajnik and N. K. Jha, “Graceful Degradation in Algorithm-Based Fault Tolerant Multiprocessor Systems,” IEEE Trans. on Parallel and Distributed Systems, vol. 8, pp. 137-153, 1997.
14. R. K. Sitaraman and N. K. Jha, “Optimal Design of Checks for Error Detection and Location in Fault -Tolerant Multiprocessor Systems,” IEEE Trans. on Computers, vol. 42, pp. 780-793, 1993.
15. P. Duba and R. K. Iyer, “Transient Fault Behavior in a Microprocessor: A Case Study,” presented at ICCD 1988, 1988.
16. J. Carreira, H. Madeira, and J. G. Silva, “Xception: Software Fault Injection and Monitoring in Processor Functional Units,” presented at DCCA'95, Urbana, Champaign-USA, 1995.
17. J. H. Saltzer, D.P.Reed, and D.D.Clark, “End-To-End Arguments in System Design,” ACM Transactions on Computer Systems, vol. 2, pp. 277-288, 1984.
18. A. Mahmood, E. J. McCluskey, and D. J. Lu, “Concurrent Fault Detection Using a Watchdog Processor and Assertions,” presented at 1983 International Test Conference (ITC), 1983.
19. D. M. Andrews, “Using Executable Assertions for Testing and Fault Tolerance,” presented at FTCS-9, 1979.
20. B. L. M. N. McMillin, “Executable Assertion Development for the Distributed Parallel Environment,” presented at COMPSAC 88, Chicago IL, 1988.
21. N. Leveson and T. J. Shimeall, “Safety Assertions for Process-Control Systems,” presented at FTCS-13, 1983.
22. A. Watanabe and K. Sakamura, “Design Fault Tolerance in Operating Systems Based on a Standardization Project,” presented at FTCS-25, Pasadena-California, 1995.
23. N. Higham, Accuracy and Stability of Numerical Algorithms: SIAM, 1996.
24. D. Powell, “Failure Mode Assumptions and Assumption Coverage,” presented at Twenty Second Annual International Symposium on Fault-Tolerant Computing (FTCS-22), Boston-MA, 1992.