Correction to “Physical Modeling of Lateral Scaling in Bipolar Transistors”

IEEE Journal of Solid-State Circuits

Volumn 33, Issue 1, 1998, Pages 171-

  Schröter, Michael ^a   Walkey, D J ^a  

^a NONE

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Indexed keywords

EID: 85008028724     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/JSSC.1998.654953     Document Type: Erratum

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