A survey of interconnection methods for reconfigurable parallel processing systems

1979 International Workshop on Managing Requirements Knowledge, MARK 1979

Volumn , Issue , 1979, Pages 529-542

  Siegel, Howard Jay ^a   McMillen, Robert J ^a   Mueller, Philip T ^a  

^a PURDUE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

INTERCONNECTION NETWORKS (CIRCUIT SWITCHING); SURVEYS;

INTERCONNECTION METHOD; RECONFIGURABLE;

PARALLEL PROCESSING SYSTEMS;

EID: 85005435645     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MARK.1979.8817077     Document Type: Conference Paper

References (50)

1. Anderson, G. A., E. D. Jensen, "Computer interconnection structures: Taxonomy, characteristics, and examples," ACM Computing Surveys, Vol. 7, No. 4, Dec. 1975, pp. 197-213.
2. Arnold, R. G., E. W. Page, "A hierarchical, restructurable multimicroprocessor architecture," 3rd Annual Symposium on Computer Architecture, Jan. 1976, pp. 40-45.
3. Baer, J. L., "Multiprocessing systems," IEEE Trans, on Comput., Vol. C-25, No. 12, Dec. 1976, pp. 1271-1277.
4. Barnes, G., et. al., "The Illiac IV computer," IEEE Trans. Comput., Vol. C-17, No. 8, Aug. 1968, pp. 746-757.
5. Batcher, K. E., "STARAN parallel processor system hardware," Nat'l. Computer Conf., May 1974, pp. 405-410.
6. Batcher, K. E., "The flip network in STARAN," 1976 Int'l. Conf. on Parallel Processing, Aug. 1976, pp. 65-71.
7. Batcher, K. E., "The multi-dimensional access memory in STARAN," IEEE Trans, on Comput., Vol. C-26, No. 2, Feb. 1977, pp. 174-177.
8. Bouknight, W. J., et. al., "The Illiac IV system," Proc. IEEE, Vol. 60, Apr. 1972, pp. 369-388.
9. Davis, E. W., "STARAN parallel processor system software," Nat. Computer Conf., May 1974, pp. 17-22.
10. Enslow, P. H., Jr., "Multiprocessor organization-A survey," ACM Computing Surveys, Vol. 9, Mar. 1977, pp. 103-129.
11. Feierbach, G., D. Stevenson, A Feasibility Study of Programmable Switching Networks for Data Routing, Institute for Advanced Computation Phoenix Project Memorandum No. 003, May 1977.
12. Feldman, J. D., L. C. Fulmer, "RADCAP-an operational parallel processing facility," Nat. Computer Conf., May 1974, pp. 7-15.
13. Feng, T., "Data manipulating functions in parallel processors and their implementations," IEEE Trans. Comput., Vol. C-23, No. 3, Mar. 1974, pp. 309-318.
14. Flynn, M. J., "Very high-speed computer systems," Proc. IEEE, Vol. 54, Dec. 1966, pp. 1901-1909.
15. Goke, L. R., "Connecting networks for partitioning polymorphic systems," Doctoral dissertation, Dept, of Electrical Engineering, University of Florida, 1976.
16. Goke, L. R., G. J. Lipovski, "Banyan networks for partitioning multiprocessor systems," 1st Annual Symposium on Computer Architecture, Dec. 1973, pp. 21-28.
17. Jones, A. K., et. al., "Software management of Cm-A distributed multiprocessor," Nat. Computer Conf., June 1977, pp. 657-663.
18. Kartashev, S. I., S. P. Kartashev, "Dynamic architectures: Problems and solutions," Computer, Vol. 11, July 1978, pp. 26-41.
19. Kartashev, S. I., S. P. Kartashev, guest eds., "Modular computers and networks," Computer, Vol. 11, July 1978, whole issue.
20. Kuck, D. J., "A survey of parallel machine organization and programming," ACM Computing Surveys, Vol. 9, Mar. 1977, pp. 29-59.
21. Lawrie, D., "Access and alignment of data in an array processor," IEEE Trans, on Comput., Vol. C-24, No. 12, Dec. 1975, pp. 1145-1155.
22. Lipovski, G. J., A. Tripathi, "A reconfigurable varistructure array processor," 1977 Int'l. Conf. on Parallel Processing, Aug. 1977, pp. 165-174.
23. Nutt, G. J., "Microprocessor implementation of a parallel processor," 4th Annual Symposium on Computer Architecture, Mar. 1977, pp. 147152.
24. Okada, Y., H. Tajima and R. Mori, "A novel multiprocessor array," 2nd Symposium on Micro Architecture, 1976, pp. 83-90.
25. Paker, Y., M. Bozyigit, "Variable topology multicomputer," 2nd Symposium on Micro Architecture, 1976, pp. 141-151.
26. Pease, M. C., "The indirect binary n-cube microprocessor array," IEEE Trans. Comput., Vol. C-26, No. 5, May 1977, pp. 458-473.
27. Reddi, S. S., E. A. Feustel, "A restructurable computer system," IEEE Trans. Comput., Vol. C-27, No. 1, Jan. 1978, pp. 1-20.
28. Siegel, H. J., "Analysis techniques for SIMD machine interconnection networks and the effects of processor address masks," 1975 Sagamore Computer Conf. on Parallel Processing, Aug. 1975, pp. 106-109.
29. Siegel, H. J., "Single instruction stream-multiple data stream machine interconnection network design," 1976 Int'l. Conf. on Parallel Processing, Aug. 1976, pp. 272-282.
30. Siegel, H. J., "Analysis techniques for SIMD machine interconnection networks and the effects of processor address masks," IEEE Trans. Comput., Vol. C-26, No. 2, Feb. 1977, pp. 153-161.
31. Siegel, H. J., "The universality of various types of SIMD machine interconnection networks," 4th Annual Symposium on Computer Architecture, Mar. 1977, pp. 70-79.
32. Siegel, H. J., "Preliminary design of a versatile parallel image pro cessing system," Third Biennial Conf. on Computing in Indiana, April 1978, pp. 11-25.
33. Siegel, H. J., "Partitionable SIMD computer system interconnection network universality," I6th Annual Allerton Conf. on Communication, Control, and Computing, Oct. 1978.
34. Siegel, H. J., S. D. Smith, "Study of multistage SIMD interconnection networks," 5th Annual Symposium on Computer Architecture, Apr. 1978, pp. 223-229.
35. Siegel, H. J., P. T. Mueller, Jr., H. E. Smalley, Jr., Preliminary Design Alternatives for a Versatile Parallel Image Processor, School of Electrical Engineering, Purdue University, Technical Report TR-EE 7832, June 1978.
36. Siegel, H. J., P. T. Mueller, Jr., H. E. Smalley, Jr., "Control of a partitionable multimicroprocessor system," 1978 Int'l. Conf. Parallel Processing, Aug. 1978, pp. 9-17.
37. Siegel, H. J., P. T. Mueller, Jr., "The organization and language design of microprocessors for an SIMD/MIMD system," Second Rocky Mt. Symp. on Microcomputers, Aug. 1978, pp. 311-340.
38. Siegel, H. J., R. J. McMillen, P. T. Mueller, Jr., S. D. Smith, A Versatile Parallel Image Processor: Some Hardware and Software Problems, School of Electrical Engineering, Purdue University, Technical Report TR-EE 78-43, Oct. 1978.
39. Smith, S. D., H. J. Siegel, "Recirculating, Pipelined, and Multistage SIMD interconnection networks," 1978 Int'l. Conf. Parallel Processing, Aug. 1978, pp. 206-214.
40. Stone, H. S., "Parallel processing with the perfect shuffle," IEEE Trans. Comput., Vol. C-20, No. 2, Feb. 1971, pp. 153-161.
41. Stone, H. S., "Parallel Computers," in Introduction to Computer Architecture, H. S. Stone, ed., S.R.A., 1975.
42. Sullivan, H., T. R. Bashkow, and K. Klappholz, "A large scale homogeneous, fully distributed parallel machine," Fourth Annual Symposium on Computer Architecture, Mar. 1977, pp. 105-124.
43. Swan, R. J., S. H. Fuller, and D. P. Siewiorek, "Cm: A modular, multi-microprocessor," Nat. Computer Conf, June 1977, pp. 637-644.
44. Swan, R. J., et. al., "The implementation of the Cm∗multi-microprocessor," Nat. Computer Conf, June 1977, pp. 645-655.
45. Thurber, K. J., "Interconnection networks-A survey and assessment," Nat. Computer Conf, May 1974, pp. 909-919.
46. Thurber, K. J., "Circuit switching technology: A state-of-the-art survey," Compton 78, Sept. 1978.
47. Thurber, K. J., L. D. Wald, "Associative and parallel processors," ACM Computing Surveys, Vol. 7. No. '4, Dec. 1975, pp. 215-255.
48. Widdoes, L. C., Jr., "The Minerva Multi-Microprocessor," 3rd Annual Symposium on Computer Architecture, Jan. 1976, pp. 34-39.
49. Wittie, L. D., "Efficient message routing in mega-micro-computer networks," 3rd Annual Symposium on Computer Architecture, Jan. 1976, pp. 136-140.
50. Wulf, W. A., C. G. Bell, "C.mmp-A multi-miniprocessor," FJCC, Dec. 1972, pp. 765-777.